Abstract:
A flexible cable having top and bottom surfaces and top and bottom conductive layers embedded therebetween has affixed to the top surface thereof a plurality of core arrays having continuous drive conductors and separate sense and inhibit lines threaded therethrough to comprise sets of memory mats in a coincident current digital computer. Also affixed to the top surface of the cable and in the vicinity of different memory sets are respective electronic processing units which are terminated to the ends of the sense and inhibit lines threaded through the different mats. A memory conductor unique to each mat and comprised of paths in the top and bottom conductive layers and conductive through-holes therebetween communicates from an edge of the cable to the electronic units of each respective memory set. These memory conductors carry inhibit control signals to the respective electronic units during writing operations and sense signals from the electronic units during reading operations. Affixed to the bottom surface of the cable under each set of mats is a support plate, the bottom surface of which is mateable in heat transfer and supporting relationship with the bottom surface of an adjacent plate when the cable and plates are folded in an accordion-like manner. The edges of the alternate plates are then affixed in heat transfer and supporting relationship to encompassing structures.
Abstract:
Apparatus for supplying selection lines of a magnetic core memory with drive currents of uniform amplitude and configuration. The apparatus includes a pair of line selection switches at opposite ends of a selection line group for steering current from a source through a selected line and a current regulator that maintains the sum of the currents through the line at a constant level. The lines in the group are terminated by a set of alternately operable termination circuits, which set is common to all of the lines of a coordinate axis of the memory array. The termination circuit serve to damp voltage spikes, ringing oscillations and the inductive energy of the line upon energization and de-energization thereof and to maintain the lines of the memory stack at a fixed potential to prevent the lines from floating due to leakage currents and capacitive voltage build-ups that would establish the lines at different potentials during inactive or memory idle periods.
Abstract:
A COINCIDENT CURRENT MAGNETIC CORE MEMORY COMPRISING A PLURALITY OF CORE MATRICES EACH HAVING A SCRATCH PAD OR ALTERABLE DRO SECTION AND A FIXED NDRO SECTION SHARING CONDUCTORS OF ONE COORDINATE AXIS AND THE SENSE WINDINGS OF EACH MATRIX.