公开(公告)号：US10154142B2

公开(公告)日：2018-12-11

申请号：US15887878

申请日：2018-02-02

Applicant: GENESYS TELECOMMUNICATIONS LABORATORIES, INC.

Inventor： Michael Bell Rybachenko ,  Ivan Lysiuk

IPC: H04M3/00 ,  H04M3/523

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.

公开(公告)号：US20180176381A1

公开(公告)日：2018-06-21

申请号：US15887878

申请日：2018-02-02

Applicant: Genesys Telecommunications Laboratories, Inc.

Inventor： Michael Bell Rybachenko ,  Ivan Lysiuk

IPC: H04M3/523

CPC classification number: H04M3/5235 ,  H04M3/5232 ,  H04M3/5233 ,  H04M2201/14 ,  H04M2201/16

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.