公开(公告)号：US09888123B2

公开(公告)日：2018-02-06

申请号：US15431308

申请日：2017-02-13

Applicant: GENESYS TELECOMMUNICATIONS LABORATORIES, INC.

Inventor： Michael Rybachenko ,  Ivan Lysiuk

IPC: H04M3/00 ,  H04M3/523

CPC classification number: H04M3/5235 ,  H04M3/5232 ,  H04M3/5233 ,  H04M2201/14 ,  H04M2201/16

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.

公开(公告)号：US09571655B2

公开(公告)日：2017-02-14

申请号：US14448376

申请日：2014-07-31

Applicant: Genesys Telecommunications Laboratories, Inc.

Inventor： Michael Rybachenko ,  Ivan Lysiuk

IPC: H04M3/00 ,  H04M3/523

CPC classification number: H04M3/5235 ,  H04M3/5232 ,  H04M3/5233 ,  H04M2201/14 ,  H04M2201/16

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.

Abstract translation: 系统和方法包括处理器和存储器。 存储器存储指令，当处理器执行该指令时，处理器根据一段时间内的标准的功能将处理器分配到服务器，其中服务器一次只能处理确定数量的交互。

公开(公告)号：US20170155770A1

公开(公告)日：2017-06-01

申请号：US15431308

申请日：2017-02-13

Applicant: GENESYS TELECOMMUNICATIONS LABORATORIES, INC.

Inventor： Michael Rybachenko ,  Ivan Lysiuk

IPC: H04M3/523

CPC classification number: H04M3/5235 ,  H04M3/5232 ,  H04M3/5233 ,  H04M2201/14 ,  H04M2201/16

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.

公开(公告)号：US20160036978A1

公开(公告)日：2016-02-04

申请号：US14448376

申请日：2014-07-31

Applicant: Genesys Telecommunications Laboratories, Inc.

Inventor： Michael Rybachenko ,  Ivan Lysiuk

IPC: H04M3/523

CPC classification number: H04M3/5235 ,  H04M3/5232 ,  H04M3/5233 ,  H04M2201/14 ,  H04M2201/16

Abstract: A system and method include a processor and a memory. The memory stores instructions, which when executed by the processor, causes the processor to allocate interactions to a server based on a function of a criteria over time, where the server can only handle a determined number of interactions at a time.

Abstract translation: 系统和方法包括处理器和存储器。 存储器存储指令，当处理器执行该指令时，处理器根据一段时间内的标准的功能将处理器分配到服务器，其中服务器一次只能处理确定数量的交互。