公开(公告)号：US09392690B2

公开(公告)日：2016-07-12

申请号：US14177530

申请日：2014-02-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Fenton R. McFeely ,  Chih-Chao Yang

IPC: H05K1/09 ,  H01L21/768 ,  H01L23/532

CPC classification number: H05K1/09 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Techniques for improving the conductivity of copper (Cu)-filled vias are provided. In one aspect, a method of fabricating a Cu-filled via is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A thin seed Cu layer is deposited on the Ru layer. A first anneal is performed to increase a grain size of the seed Cu layer. The via is filled with additional Cu. A second anneal is performed to increase the grain size of the additional Cu.

Abstract translation: 提供了提高铜（Cu）填充通孔电导率的技术。 一方面，提供了制造填充铜的通孔的方法。 该方法包括以下步骤。 在电介质中蚀刻通孔。 通孔内有一个扩散屏障。 薄的钌（Ru）层共形沉积到扩散阻挡层上。 在Ru层上沉积薄的种子Cu层。 进行第一退火以增加种子Cu层的晶粒尺寸。 通孔填充有额外的铜。 进行第二次退火以增加附加Cu的晶粒尺寸。