公开(公告)号：US20190035731A1

公开(公告)日：2019-01-31

申请号：US15664484

申请日：2017-07-31

Applicant: GLOBALFOUNDRIES INC.

Inventor： Luke ENGLAND ,  Mark W. KUEMERLE

IPC: H01L23/525 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/5256 ,  H01L21/76892 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5384

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an interconnect structure to connect between different package configurations and methods of manufacture. The structure includes an interconnect comprising a plurality of conductive levels and columns configured into a grid pattern within an insulator material, the plurality of conductive levels and columns aligned to connect to different package configurations; and a control circuit that provides a signal to the interconnect to connect to a combination of the different package configurations.

公开(公告)号：US20210111141A1

公开(公告)日：2021-04-15

申请号：US16599738

申请日：2019-10-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Wolfgang SAUTER ,  Mark W. KUEMERLE ,  Eric W. TREMBLE

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to partitioned substrates with interconnect bridge structures and methods of manufacture. The structure includes: a plurality of substrates; at least one chip bonded and electrically connected to each of the plurality of substrates; and an interconnect bridge that physically connects the plurality of substrates and electrically connects each of the plurality of chips bonded to each of the plurality of substrates.