TSV redundancy scheme and architecture using decoder/encoder
    1.
    发明授权
    TSV redundancy scheme and architecture using decoder/encoder 有权
    TSV冗余方案和使用解码器/编码器的架构

    公开(公告)号:US09401312B1

    公开(公告)日:2016-07-26

    申请号:US14736769

    申请日:2015-06-11

    Abstract: A method of redirecting signal bits associated with or corresponding to defective TSVs of a TSV array to a row or a column of redundant TSVs in the TSV array using a 2:4 Decoder and 4:2 Encoder and the resulting device are provided. Embodiments include forming a TSV array between a bottom die and a top die of a 3D IC stack, the TSV array having a row and a column of redundant TSVs; identifying a defective TSV of the TSV array; determining whether to shift a signal bit associated with or corresponding to the defective TSV in a first and/or a second direction towards the row or the column of redundant TSVs; and shifting the signal bit in the first and/or the second direction until the signal bit has been redirected to the row or the column of redundant TSVs.

    Abstract translation: 提供了使用2:4解码器和4:2编码器将与TSV阵列的有缺陷TSV相关联或对应的信号位重定向到TSV阵列中的冗余TSV的行或列的方法,并且得到所述装置。 实施例包括在3D IC堆叠的底模和顶模之间形成TSV阵列,该TSV阵列具有一列和一列冗余TSV; 识别TSV阵列的有缺陷的TSV; 确定是否将与第一和/或第二方向上的有缺陷TSV相关联的信号位或对应于与残余TSV相对应的信号位朝着冗余TSV的行或列移位; 并且在第一和/或第二方向上移位信号位,直到信号位被重定向到冗余TSV的行或列。

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