公开(公告)号：EP4535658A1

公开(公告)日：2025-04-09

申请号：EP23210094.1

申请日：2023-11-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bellaouar, Abdellatif ,  Syed, Shafiullah

IPC: H03F1/02 ,  H03F1/22 ,  H03F3/195 ,  H03F3/213 ,  H03F3/45

Abstract: A disclosed structure includes a power amplifier and circuitry for implementing a biasing scheme that enables high power operation. The power amplifier includes parallel transistor chains connected to input and output transformers. Each chain includes series-connected first, second, and third n-type field effect transistors (NFETs) having front and back gates. The output transformer receives a variable positive power supply voltage generated using average power tracking. Front and back gates of each third NFET receive a positive bias voltage greater than or equal to the variable positive power supply voltage and a negative bias voltage, respectively. By negative back biasing the third NFETs, threshold voltages thereof are raised so a high positive bias voltage can be applied to the front gates to increase power output without violating reliability specifications. Optionally, by making the negative bias voltage temperature dependent, voltages at source regions of the third NFETs are held constant.

公开(公告)号：EP4535661A1

公开(公告)日：2025-04-09

申请号：EP23210063.6

申请日：2023-11-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Bellaouar, Abdellatif ,  Syed, Shafiullah

IPC: H03F1/32 ,  H03F3/195 ,  H03F3/21 ,  H03F3/45

Abstract: A differential power amplifier circuit (100), including: a first differential power amplifier (102) including first and second cross-coupled neutralization capacitors; and a second differential power amplifier (104), coupled in parallel with the first differential power amplifier (102), including a plurality of multi-gate transistors (106).