Abstract:
A reduced hardware complexity, reduced computational intensity finite impulse response filter architecture for filtering multiple (quadrature) channels of an RF modem comprises a cascaded arrangement of L data register stages through which respective digitally encoded data sample values of a signal to be filtered are sequentially clocked. Each data register stage has a data capacity greater than twice the code width of a respective digitized channel sample, so that each register stage can store both I and Q channel data. A multiplier unit is coupled to the data register and multiplies both I and Q contents of respective ones of the register stages by respective impulse response coefficient values. The resulting I and Q products are summed into I and Q channel convolutional sums.
Abstract:
A method for routing a call to a called party who may be located at any one of plural sites which avoids delays in connecting the called party to the received call. When a call is received at a switch, a controller at the switch uses an embedded data base to identify plural sites where the called party may be located from among a multiplicity of sites to which the switch can be connected and causes the switch to initiate parallel connections from the switch to the identified sites. Another method of operating a telephone system in which a called party receives a telephone call from a calling party which is not to be answered and in which the called party is free to use its telephone while continuing to provide a ring signal to the calling party. Upon receipt of one or more rings at the called party's telephone, one or more key strokes are entered at the called party's telephone to provide a refusal signal to the telephone system which is providing a ring signal to the calling party. A further method of routing an incoming telephone call to a called party having plural telephone numbers in which a telephone call for the called party is received at a switching system, and automatically screened to determine where the received call is to be routed among plural devices with different telephone numbers for accessing the called party, where the devices may include a wireless telephone and a pager.
Abstract:
A subscriber line circuit test arrangement for a non-metallic (fiber optic) digital communication path-based digital communication network that employs a single (basic rate ISDN) metallic channel unit (BMCU) installed at a site terminating the fiber optic communication path. A BMCU communicates with a central office test system using an auxiliary B-ISDN communication 'test' channel portion (2B+D) of the time division multiplexed digital communication DS0 channels. Digital command and response signals are transported by the two ISDN bearer (B) channels and are coupled directly to tip and ring digital signal processors in the central office test system. The data (D) channel is employed to conduct access, calibration and control communications with the metallic channel unit.
Abstract:
A pattern for a wafer for a MOS-gated semiconductor device includes plural ribbons extending from a source contact region to another source contact region, each of the ribbons having a single source region between two channel regions, so as to increase the device's current-carrying capability per unit area relative to the prior art. The pattern increases the size of the active current-carrying area (the channel and neck regions of the device) relative to the area of the source contact areas. The source contact regions may be discrete or linear, and the ribbons may extend therefrom perpendicularly or at other angles.
Abstract:
Recessed isolation oxide is deposited in shallow trenches simultaneously with oxide deposition in deep isolation trenches. A single planarization of both trench fillings provides efficient recessed isolation oxide without bird's beak or bird's head problems of LOCOS isolation oxide. Self-aligned trench filling by successive conformal depositions of oxide and polysilicon followed by planarization to remove polysilicon away from the trenches. The remaining polysilicon may be used as an oxide etch mask to remove all of the oxide except in the trenches.
Abstract:
A high voltage protection circuit includes breakdown networks for providing a discharge path between a pair of terminals of a circuit to be protected. Each network conducts current between a supply terminal and another terminal at a low threshold voltage value when power is removed from the supply terminal. The network increases the threshold value when power is applied to the supply terminal to prevent conduction through the breakdown network during normal operation of the circuit to be protected. In one implementation, the protection circuit includes anti-latching circuitry connected to the breakdown network for preventing the breakdown network from latching on after or during the time power is applied to the supply terminals. To minimize the degradation of DC operating characteristics, the leakage currents, due to the protection circuit, between the first terminal and the positive supply terminal, and between the first terminal and the negative supply terminal cancel each other. The protection circuit may be incorporated on the same substrate as the circuit to be protected or it may be incorporated on a separate substrate sharing a common housing with the circuit to be protected. Alternately, the protection circuit may be in its own housing with its external leads connected to the leads of a first housing including the circuit to be protected.
Abstract:
A composite thyristor comprising a plurality of parallel connected identical thyristor cells (40) each of the cells including a turn-on field effect transistor (FET) (72) and a turn-off FET (62). The gate electrodes (34) of all the FETs form a grid-like pattern on a surface of the semiconductor substrate of the device. The pattern includes strips which intersect at corners. Turn-off FETs (62) are formed along the boundary of the grid and beneath it, and turn-on FETs (72) are disposed beneath the corners.
Abstract:
The tendency of mobile positive ions to be transported into device regions of a bipolar transistor is effectively minimized by surrounding the transistor with a "positive ion"-attracting electric field, preferably by applying a prescribed bias to the fill material of a conductive trench that surrounds the device. The trench which surrounds a respective device to be protected contains dielectric material disposed along sidewalls of the trench. The trench contains material such as undoped polysilicon, which is capable of distributing a voltage, so that the material in the trench is insulated by dielectric material from an adjacent portion of the semiconductor substrate surrounded by the trench. In order to prevent mobile positive ions from moving into a device region in response to temperature bias stress and thereby degrade an operational parameter of the transistor, a predefined (relatively negative) bias voltage is applied to the material in the trench. By relatively negative is meant that the magnitude of the predefined bias voltage is established to be no more positive than half the difference between the most positive and the most negative of bias voltages that are applied to the device. Preferably, the prescribed bias voltage corresponds to the most negative of the plurality of bias voltages of the transistor.
Abstract:
A power FET composed of a substrate having upper and lower surfaces and having at least one body region (2) of a first conductivity type which extends to said upper surface (4); and at least one base region (6) extending into the substrate from the upper surface, the base region being of a second conductivity type and having at least two portions between which the at least one body region extends, and an insulated gate (20) disposed at the upper surface above the body region, the substrate further has a shielding region (30) of the second conductivity type extending into the least one body region from the upper surface, at a location below the gate electrode and enclosed by the base region portions, and spaced from the base region by parts of the body region of the first conductivity type.