1.
    发明专利
    未知

    公开(公告)号:AT438586T

    公开(公告)日:2009-08-15

    申请号:AT05856851

    申请日:2005-06-28

    Abstract: A nano-scale device and method of fabrication provide a nanowire having (111) vertical sidewalls. The nano-scale device includes a semiconductor-on-insulator substrate polished in a [110] direction, the nanowire, and an electrical contact at opposite ends of the nanowire. The method includes wet etching a semiconductor layer of the semiconductor-on-insulator substrate to form the nanowire extending between a pair of islands in the semiconductor layer. The method further includes depositing an electrically conductive material on the pair of islands to form the electrical contacts. A nano-pn diode includes the nanowire as a first nano-electrode, a pn-junction vertically stacked on the nanowire, and a second nano-electrode on a (110) horizontal planar end of the pn-junction. The nano-pn diode may be fabricated in an array of the diodes on the semiconductor-on-insulator substrate.

    2.
    发明专利
    未知

    公开(公告)号:DE602005015856D1

    公开(公告)日:2009-09-17

    申请号:DE602005015856

    申请日:2005-06-28

    Abstract: A nano-scale device and method of fabrication provide a nanowire having (111) vertical sidewalls. The nano-scale device includes a semiconductor-on-insulator substrate polished in a [110] direction, the nanowire, and an electrical contact at opposite ends of the nanowire. The method includes wet etching a semiconductor layer of the semiconductor-on-insulator substrate to form the nanowire extending between a pair of islands in the semiconductor layer. The method further includes depositing an electrically conductive material on the pair of islands to form the electrical contacts. A nano-pn diode includes the nanowire as a first nano-electrode, a pn-junction vertically stacked on the nanowire, and a second nano-electrode on a (110) horizontal planar end of the pn-junction. The nano-pn diode may be fabricated in an array of the diodes on the semiconductor-on-insulator substrate.

    3.
    发明专利
    未知

    公开(公告)号:DE602005013999D1

    公开(公告)日:2009-05-28

    申请号:DE602005013999

    申请日:2005-11-18

    Abstract: An apparatus for controlling propagation of incident electromagnetic radiation is described, comprising a composite material having electromagnetically reactive cells of small dimension relative to a wavelength of the incident electromagnetic radiation. At least one of a capacitive and inductive property of at least one of the electromagnetically reactive cells is temporally controllable to allow temporal control of an associated effective refractive index encountered by the incident electromagnetic radiation while propagating through the composite material.

    4.
    发明专利
    未知

    公开(公告)号:DE112008001009T5

    公开(公告)日:2010-03-18

    申请号:DE112008001009

    申请日:2008-04-25

    Abstract: A gain-clamped semiconductor optical amplifier comprises: at least one first surface; at least one second surface, each second surface facing and electrically isolated from a respective first surface; a plurality of nanowires connecting each opposing pair of the first and second surfaces in a bridging configuration; and a signal waveguide overlapping the nanowires such that an optical signal traveling along the signal waveguide is amplified by energy provided by electrical excitation of the nanowires.

    NANOWIRE DEVICE WITH (111) VERTICAL SIDEWALLS AND METHOD OF FABRICATION
    6.
    发明申请
    NANOWIRE DEVICE WITH (111) VERTICAL SIDEWALLS AND METHOD OF FABRICATION 审中-公开
    具有(111)垂直边的纳米器件和制造方法

    公开(公告)号:WO2006083310A3

    公开(公告)日:2006-10-05

    申请号:PCT/US2005022699

    申请日:2005-06-28

    Abstract: A nano-scale device 10, 20, 30, 60 and method 40, 50, 70 of fabrication provide a nanowire 14, 24, 34, 64 having (111) vertical sidewalls 14a, 22e, 34a, 64a. The nano-scale device includes a semiconductor-on-insulator substrate 12, 22, 32, 62 polished in a [110] direction, the nanowire, and an electrical contact 26, 35 at opposite ends of the nanowire 24, 34. The method 40, 50, 70 includes wet etching 42, 52, 72 a semiconductor layer 12a, 22a, 32a. 62a of the semiconductor-on-insulator substrate to form 44, 54 the nanowire 24, 34 extending between a pair of islands 22f, 32f in the semiconductor layer 22a, 32a. The method 50 further includes depositing 56 an electrically conductive material on the pair of islands to form the electrical contacts 26, 36. A nano-pn diode 60 includes the nanowire 64 as a first nano-electrode, a pn-junction 66 verically stacked on the nanowire 64, and a second nano-electrode 68 on a (110) horizontal planar end of the pn-junction. The nano-pn diode 60 may be fabricated in array of the diodes on the semiconductor-on-insulator substrate 62.

    Abstract translation: 具有(111)垂直侧壁14a,22e,34a,64a的纳米级器件10,20,30,60和制造方法40,50,70制成纳米线14,24,34,64。 纳米级器件包括在[110]方向上抛光的绝缘体上半导体衬底12,22,32,62,纳米线和在纳米线24,34的相对端的电接触26,35。 40,50,70包括湿蚀刻42,52,72半导体层12a,22a,32a。 62a,以形成44,54在半导体层22a,32a中的一对岛状物22f,32f之间延伸的纳米线24,34。 方法50还包括在该对岛上沉积56导电材料以形成电接触26,36。纳米pn二极管60包括作为第一纳米电极的纳米线64, 纳米线64和在pn结的(110)水平平面端上的第二纳米电极68。 可以在绝缘体上半导体衬底62上的二极管的阵列中制造纳米pn二极管60。

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