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    LOGIC SYNTHESIS
    1.
    发明申请
    LOGIC SYNTHESIS 审中-公开
    逻辑合成

    公开(公告)号：WO1992007333A1

    公开(公告)日：1992-04-30

    申请号：PCT/US1991007555

    申请日：1991-10-09

    Applicant: HEWLETT-PACKARD COMPANY

    Inventor： HEWLETT-PACKARD COMPANY ,  CULBERTSON, Bruce ,  SHACKLEFORD, Barry

    IPC: G06F15/60

    CPC classification number: G06F17/5045 ,  G06F7/00

    Abstract: A computerized logic synthesizer. The synthesizer receives a functional logic design and simulates a logic circuit. A plurality of module generators provide various circuit alternatives. The system includes means for optimizing the design of the circuit. A topology graph illustrates critical paths through the circuit. Virtual instruments are used to simulate operation of the circuit.

    Abstract translation: 电脑逻辑合成器。 合成器接收功能逻辑设计并模拟逻辑电路。 多个模块发生器提供各种电路替代方案。 该系统包括用于优化电路设计的装置。 拓扑图说明了通过电路的关键路径。 虚拟仪器用于模拟电路的运行。

    LOGIC SYNTHESIS with critical path analysis
    2.
    发明授权
    LOGIC SYNTHESIS with critical path analysis 失效
    逻辑综合与关键路径分析

    公开(公告)号：EP0506925B1

    公开(公告)日：1996-06-26

    申请号：EP91918982.9

    申请日：1991-10-09

    Applicant: Hewlett-Packard Company

    Inventor： CULBERTSON, Bruce ,  SHACKLEFORD, Barry

    IPC: G06F17/50

    CPC classification number: G06F17/5045 ,  G06F7/00

    Abstract: A computerized logic synthesizer. The synthesizer receives a functional logic design and simulates a logic circuit. A plurality of module generators provide various circuit alternatives. The system includes means for optimizing the design of the circuit. A topology graph illustrates critical paths through the circuit. Virtual instruments are used to simulate operation of the circuit.

    LOGIC SYNTHESIS
    3.
    发明公开
    LOGIC SYNTHESIS 失效
    逻辑综合。

    公开(公告)号：EP0506925A1

    公开(公告)日：1992-10-07

    申请号：EP91918982.0

    申请日：1991-10-09

    Applicant: Hewlett-Packard Company

    Inventor： CULBERTSON, Bruce ,  SHACKLEFORD, Barry

    IPC: G06F17 ,  G06F7

    CPC classification number: G06F17/5045 ,  G06F7/00

    Abstract: Synthétiseur logique à ordinateur. Le synthétiseur reçoit une conception logique fonctionnelle et simule un circuit logique. Une pluralité de générateurs modulaires produisent diverses variantes de circuits. Le système comprend des moyens optimisant la conception du circuit. Un graphique de topologie illustre les chemins critiques dans le circuit. On utilise des instruments virtuels afin de simuler le fonctionnement du circuit.

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