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公开(公告)号：US20200001306A1
公开(公告)日：2020-01-02
申请号：US16486134
申请日：2017-02-14
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Ning Ge , Paul Howard Mazurkiewicz , Helen A. Holder , Peter A. Seiler , Raphael Gay , Tom J. Searby
Abstract: In an example, an air filter assembly includes an air filter to remove particulates from air flowing through the air filter, sense electrodes coupled to the air filter, the sense electrodes spaced apart in a direction that is transverse to a direction of a flow of the air, a sense interconnects to couple the sense electrodes to a first power source to drive a sense electrode of the sense electrodes to a sense power, charge electrodes coupled to the air filter, where the charge electrodes are spaced apart from and adjacent to the sense electrodes, and charge interconnects to couple the charge electrodes to a second power source to drive a charge electrode of the charge electrodes to a charge power different from the sense power.
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公开(公告)号：US10198206B2
公开(公告)日：2019-02-05
申请号：US15544667
申请日：2015-04-17
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Raphael Gay , Kirsten Olsen
Abstract: Example implementations relate to memory mode categorization. An example memory mode categorization can include determining local and remote data bandwidths received at each of a first processor and a second processor for a data sample, comparing the local and the remote data bandwidths to a first threshold bandwidth and a second threshold bandwidth, respectively, creating a traffic pattern for the data sample based on the comparison, and categorizing the data sample as being a candidate for a particular memory mode based on the created traffic pattern.
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公开(公告)号：US11003565B2
公开(公告)日：2021-05-11
申请号：US15544650
申请日：2015-04-21
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Raphael Gay , Peter C Peterson , Kirsten Olsen
Abstract: An example system for a performance gains predictor includes a counter engine to determine a number of events during an application session of a computing system utilizing a first processor, a metrics engine to calculate a number of metrics for the first processor based on the number of events, a factor engine to determine a number of factors of the first processor that can affect the number of metrics based on an evaluation of the computing system, and a performance engine to predict a performance change of the computing system utilizing a second processor based on the number of factors.
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公开(公告)号：US09984015B2
公开(公告)日：2018-05-29
申请号：US15116208
申请日：2014-02-28
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Roger A. Pearson , Raphael Gay
IPC: G06F13/362 , G06F13/16 , G06F13/40 , G06F13/42
CPC classification number: G06F13/362 , G06F13/1678 , G06F13/4022 , G06F13/4027 , G06F13/4282
Abstract: In one example in accordance with the present disclosure, a computing system is provided. The computing system includes a first bus controller to control X bus lanes, a second bus controller to control Y bus lanes, a 2-to-1 X lane multiplexer, and a Y lane system component, where Y>X>0. X lanes from the first bus controller are coupled to the 2-to-1 X lane multiplexer. X lanes from the second bus controller are coupled to the 2-to-1 X lane multiplexer, and Y-X lanes from the second bus controller are coupled directly to the Y lane system component. In addition, X lanes from the 2-to-1 X lane multiplexer are coupled to the Y lane system component.
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公开(公告)号：US20210384729A1
公开(公告)日：2021-12-09
申请号：US17056875
申请日：2019-02-25
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Fred Charles Thomas, III , J. Michael Stahl , Adolfo Gomez , Raphael Gay
Abstract: A first alternating current (AC) power may be changed into a direct current (DC) power and stored in an energy storage as stored power. The stored power may be converted into a second AC power and combined with the first AC power.
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Patent Agency Ranking
公开(公告)号：US20210294721A1
公开(公告)日：2021-09-23
申请号：US16482358
申请日：2017-07-20
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Taciano Perez , Tadeu Marchese , Raphael Gay , Raphael Gay
IPC: G06F11/34 , G06F11/30 , G06F11/32 , G06F16/901
Abstract: A program is executed on a first computer system and the execution of the program is monitored. A plurality of operation records are created based upon the monitoring, where each operation record is associated with an operation carried out during execution of the program. A first value of a cumulative performance indicator associated with the execution of the program on the first computer system is determined. For each operation record, a value of a performance indicator associated with carrying out the operation on a second computer system is predicted. For an operation record, the value of the performance indicator is predicted based on a performance model associated with carrying out operations on the second computer system. A second value of the cumulative performance indicator is determined, which is associated with execution of the program on the second computer system and is based on the predicted values of the performance indicator.
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公开(公告)号：US11093136B2
公开(公告)日：2021-08-17
申请号：US16482980
申请日：2017-02-01
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Tadeu Marchese , Raphael Gay , Taciano Perez
IPC: G06F3/06
Abstract: Example systems relate to system call acceleration. A system may include a processor and a non-transitory computer readable medium. The non-transitory computer readable medium may include instructions to cause the processor to run a plurality of benchmarks for a hardware configuration. The non-transitory computer readable medium may further include instructions to determine a benchmark matrix based on the plurality of benchmarks. The non-transitory computer readable medium may include instructions to determine an input/output (I/O) bandwidth ceiling for the hardware configuration based on the benchmark matrix. Additionally, the non-transitory computer readable medium may include instructions to determine a performance threshold of an I/O access parameter for the hardware configuration based on the bandwidth ceiling.
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公开(公告)号：US20210157632A1
公开(公告)日：2021-05-27
申请号：US17045791
申请日：2018-06-22
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Raphael Gay , Kirsten Olsen , Tadeu Marchese , Roberto Bender
Abstract: Examples of methods for controlling calls to a kernel by a computing device are described herein. In some examples of the methods, an amount of calls from a program to a scheduler function in a kernel space are determined in a user mode. In an example, a call from the program is intercepted in the user mode and the call is filtered in response to determining that the amount of calls satisfies a filtering criterion.
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公开(公告)号：US10248605B2
公开(公告)日：2019-04-02
申请号：US15543200
申请日：2015-01-28
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Roger A. Pearson , Shane Ward , Raphael Gay
Abstract: An apparatus includes a pass-through module that includes connector pins to connect with at least one active motherboard connector and to separately connect with at least one routing motherboard connector. A routing function on the pass-through module redirects a set of bidirectional lanes from the connector pins connected to the active motherboard connector to the connector pins connected to the routing motherboard connector to enable a connection of the set of bidirectional lanes to at least one other motherboard connector via the routing motherboard connector.
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公开(公告)号：US20180314615A1
公开(公告)日：2018-11-01
申请号：US15543187
申请日：2015-01-28
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Raphael Gay , Peter Christian Peterson , Finagnon Thierry Dossou, JR.
CPC classification number: G06F11/3409 , G06F11/3093 , G06F11/348 , G06F2201/86 , G06F2201/88
Abstract: A computing system for collecting hardware performance data includes a number of programmable counters associated with a number of units of a computing device. The computing system further includes an assignment module executed by a processor to assign a plurality of interleaving groups of counters based on a user-defined priority list of parameters.
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