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    LOW POWER CONSUMPTION ELECTRONIC CIRCUIT
    3.
    发明专利
    LOW POWER CONSUMPTION ELECTRONIC CIRCUIT 未知

    公开(公告)号：HK43486A

    公开(公告)日：1986-06-20

    申请号：HK43486

    申请日：1986-06-09

    Applicant: HITACHI LTD

    Inventor： YAMASHIRO OSAMU ,  HONGO TOYOHIKO

    IPC: G05F3/24 ,  G04C10/00 ,  G04G19/00 ,  G04G19/02 ,  H02M3/07 ,  H02J7/00

    Abstract: According to the present invention, the voltage of a battery is supplied to an electronic circuit such as a watch circuit through a step down circuit which is constructed of capacitors and switching MIDFETs. The step down circuit performs a current converting operation as well as a voltage converting operation. The operating current of the electronic circuit is reduced by the reduction in the operating voltage of the same. As a result that the operating current level of the electronic circuit is dropped and that the current conversion is performed by the step down circuit, the battery current is relatively largely dropped. The construction thus far described elongates the lifetime of the battery. According to the present invention, therefore, there is provided a circuit which is proper for driving the step down circuit.

    REFERENCE VOLTAGE GENERATOR DEVICE
    6.
    发明专利
    REFERENCE VOLTAGE GENERATOR DEVICE 未知

    公开(公告)号：CA1145063A

    公开(公告)日：1983-04-19

    申请号：CA395811

    申请日：1982-02-08

    Applicant: HITACHI LTD

    Inventor： YOH KANJI ,  YAMASHIRO OSAMU ,  MEGURO SATOSHI

    IPC: H01L21/28 ,  H01L21/74

    Abstract: REFERENCE VOLTAGE GENERATOR DEVICE The method is for manufacturing a semiconductor device with at least a pair of insulated gate field-effect transistors having semiconductor gate electrodes of different conductivity types. A semiconductor layer of one conductivity type is selectively removed to provide patterns of first and second gate electrodes, and a mask is formed over the first gate electrode except for the second gate electrode. Thereafter, an impurity of the opposite conductivity type is introduced into the surface of a semiconductor substrate, over which the first and second gate electrodes are formed, to form source and drain semiconductor regions on opposite sides of each of the first and second gate electrodes and to convert the conductivity type of the unmasked second gate electrode to the opposite conductivity type. The method has the advantage of enabling manufacture of an improved semiconductor device without increasing the number of fabrication steps.

    10.
    发明专利
    未知

    公开(公告)号：DE3008280A1

    公开(公告)日：1980-10-23

    申请号：DE3008280

    申请日：1980-03-04

    Applicant: HITACHI LTD

    Inventor： YAMASHIRO OSAMU

    IPC: G04F5/06 ,  H03B5/36 ,  H03F3/16 ,  H03F3/18 ,  H03F3/30 ,  H03F3/34 ,  H03F3/345 ,  H03F1/30

    Abstract: A complementary amplifier circuit includes a p-channel MISFET and an n-channel MIS connected in series. The gate of the p-channel FET transistor is D.C. biased by a high impedance resistor connected between the gate and drain electrodes, and the gate of the n-channel FET is D.C. biased by a current mirror circuit formed by another n-channel FET. This complementary amplifier circuit has the advantages that the operational lower limit voltage thereof is equal to the threshold voltage of one of the MOSFETs and that stabilized operation of the amplifier is easily obtained.

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