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    NON FOSTER CIRCUIT
    1.
    发明申请
    NON FOSTER CIRCUIT 审中-公开
    非保险丝电路

    公开(公告)号：WO2012139071A4

    公开(公告)日：2013-03-07

    申请号：PCT/US2012032638

    申请日：2012-04-06

    Applicant: HRL LAB LLC ,  HITKO DONALD A ,  WHITE CARSON R ,  YUNG MICHAEL W ,  MATTHEWS DAVID S ,  MORTON SUSAN L ,  MAY JASON W ,  COLBURN JOSEPH

    Inventor： HITKO DONALD A ,  WHITE CARSON R ,  YUNG MICHAEL W ,  MATTHEWS DAVID S ,  MORTON SUSAN L ,  MAY JASON W ,  COLBURN JOSEPH

    IPC: H03F3/45 ,  H03K19/003

    CPC classification number: H03H11/10 ,  H03F1/56 ,  H03F2200/369 ,  H03H11/44 ,  H03H11/48 ,  H04B1/0458 ,  H04B1/18

    Abstract: A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as "non-Foster circuits." The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).

    Abstract translation: 差分电路拓扑产生可调浮动负电感，负电容，负电阻/电导或三者的组合。 这些电路通常被称为“非福斯特电路”。 所公开的电路实施例包括交叉耦合的两个差分对晶体管，负载导纳，多个电流源，两个共模反馈（CMFB）网络，至少一个可调谐（可变）电阻和两个端子 存在所需的导纳。 公开的电路实施例可以被配置为负阻抗逆变器（NII）或负阻抗转换器（NIC）以及作为开路稳定（OCS）和短路稳定（SCS）。

    AN AGILE RADIO ARCHITECTURE
    2.
    发明公开
    AN AGILE RADIO ARCHITECTURE 审中-公开
    FLINKE FUNKARCHITEKTUR

    公开(公告)号：EP3036838A4

    公开(公告)日：2017-04-26

    申请号：EP14876640

    申请日：2014-11-07

    Applicant: HRL LAB LLC

    Inventor： XU ZHIWEI A ,  KUAN YEN-CHENG ,  LI JAMES CHINGWEI ,  HITKO DONALD A ,  JENSEN JOSEPH F

    IPC: H04B1/00 ,  H03D7/14 ,  H04L25/08

    CPC classification number: H04L25/08 ,  H03D7/1441 ,  H03D7/1458 ,  H04B1/0035

    Abstract: An agile transceiver including a receiver channel that includes an input, a coarse tracking filter coupled to the input, the coarse tracking filter having a set of at least two bandpass filters for filtering signals from the input into at least two coarse pass bands, a mixer coupled to an output of the coarse tracking filter, a selected local oscillator coupled to the mixer for mixing with the output of the coarse tracking filter and shifting a desired coarse pass band to near a base band, a fine tracking filter for filtering the shifted and desired coarse pass band to a fine pass band, and a band pass ΣΔ demodulator for converting signals in the fine pass band from analog into digital. The agile transceiver may include a corresponding transmitter channel.

    Abstract translation: 一种包括接收器通道的灵活收发器，所述接收器通道包括输入，耦合到所述输入的粗跟踪滤波器，所述粗跟踪滤波器具有用于将来自所述输入的信号滤波到至少两个粗通带中的一组至少两个带通滤波器，混频器 耦合到粗跟踪滤波器的输出端的耦合到混频器的选定本地振荡器，用于与粗跟踪滤波器的输出混合，并将期望的粗通带移到基带附近;细跟踪滤波器， 期望的粗通带到精通带，以及用于将精通带中的信号从模拟转换成数字的带通ΣΔ解调器。 敏捷收发器可以包括相应的发射器通道。

    NON-FOSTER CIRCUIT STABILIZATION CIRCUIT AND METHOD
    3.
    发明申请
    NON-FOSTER CIRCUIT STABILIZATION CIRCUIT AND METHOD 审中-公开
    非保护电路稳定电路及方法

    公开(公告)号：WO2013006732A3

    公开(公告)日：2013-03-21

    申请号：PCT/US2012045620

    申请日：2012-07-05

    Applicant: HRL LAB LLC ,  XU ZHIWEI ,  YUNG MICHAEL W ,  HITKO DONALD A ,  WHITE CARSON R

    Inventor： XU ZHIWEI ,  YUNG MICHAEL W ,  HITKO DONALD A ,  WHITE CARSON R

    IPC: H04B1/12 ,  H03H7/38 ,  H04B1/18

    CPC classification number: H04B17/104 ,  H03H11/30 ,  H03H11/44 ,  H04B1/0458 ,  H04B17/345

    Abstract: A method of and circuit for improving stabilization of a non-Foster circuit. The method comprises steps of and the circuit includes means for measuring a noise hump power at an antenna port or an output port of the non-Foster circuit, comparing the measured noise hump power with a desired level of noise power that corresponds to a desired operating state of the non-Foster circuit, and tuning the non-Foster circuit to generate the desired level of noise power to achieve the desired operating state of the non-Foster circuit.

    Abstract translation: 一种用于改善非福斯特电路稳定性的方法和电路。 该方法包括以下步骤，并且电路包括用于测量非福斯特电路的天线端口或输出端口处的噪声驼峰功率的装置，将测得的噪声驼峰功率与对应于所需操作的期望噪声功率水平进行比较 非福斯特电路的状态，以及调谐非福斯特电路以产生期望的噪声功率水平以实现非福斯特电路的期望工作状态。

    AUTOMATIC TUNING CIRCUIT
    4.
    发明申请
    AUTOMATIC TUNING CIRCUIT 审中-公开
    自动调谐电路

    公开(公告)号：WO2013006740A2

    公开(公告)日：2013-01-10

    申请号：PCT/US2012045632

    申请日：2012-07-05

    Applicant: HRL LAB LLC ,  WHITE CARSON R ,  COLBURN JOSEPH S ,  YUNG MICHAEL W ,  HITKO DONALD A

    Inventor： WHITE CARSON R ,  COLBURN JOSEPH S ,  YUNG MICHAEL W ,  HITKO DONALD A

    CPC classification number: H04B1/18 ,  H01Q5/25 ,  H03H11/30 ,  H03H11/44

    Abstract: An automatic tuning circuit for matching an antenna to a radio receiver. The automatic tuning circuit includes a tunable non-Foster circuit for coupling the receiver and the antenna; and sensing and feedback circuits for sensing the combined capacitance of the tunable non-Foster circuit and the antenna and for tuning the tunable non-Foster circuit to automatically minimize the combined capacitance of the tunable non-Foster circuit and the antenna.

    Abstract translation: 自动调谐电路，用于将天线与无线电接收器进行匹配。 自动调谐电路包括用于耦合接收器和天线的可调谐非福斯特电路; 以及用于感测可调谐非福斯特电路和天线的组合电容并用于调谐可调谐非福斯特电路以自动最小化可调谐非福斯特电路和天线的组合电容的感测和反馈电路。

    INTERLEAVED MODULATOR
    7.
    发明公开
    INTERLEAVED MODULATOR 审中-公开

    公开(公告)号：EP3158646A4

    公开(公告)日：2018-07-04

    申请号：EP15809124

    申请日：2015-06-19

    Applicant: HRL LAB LLC

    Inventor： XU ZHIWEI A ,  BARINGER CYNTHIA D ,  PETRE PETER ,  HITKO DONALD A ,  COSAND ALBERT

    IPC: H03M3/00 ,  H03M1/06

    CPC classification number: H03M3/47 ,  H03M1/066 ,  H03M3/358 ,  H03M3/37 ,  H03M3/454 ,  H03M3/46

    Abstract: A delta sigma modulator which has improved the dynamic range. The ΔΣ modulator has a plurality of ADCs and a plurality of DACs, the plurality of ADCs and DACs are connected in a loop. The plurality of ADCs are coupled with an incoming analog signal. A clock generator provides a plurality of clock signals which control the plurality of ADCs and the plurality of DACs, the clock signals being offset relative to each other in the time domain thereby enabling each ADC in the plurality of ADCs one at a time and each DAC in the plurality of DACs one at a time so that the ΔΣ modulator processes data in the incoming analog signal in an interleaved fashion. The delta sigma modulator has an Nth order filter in a forward path of the loop.

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