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公开(公告)号：WO1990007232A1
公开(公告)日：1990-06-28
申请号：PCT/US1989005003
申请日：1989-11-14
Applicant: HUGHES AIRCRAFT COMPANY
Inventor： HUGHES AIRCRAFT COMPANY , COSAND, Albert, E.
IPC: H03K23/68
CPC classification number: H03K23/665 , H03K21/10 , H03K23/667 , H03K23/68
Abstract: A programmable counter or frequency divider includes the combination of a fixed modulus prescaler (110) and a programmable divider (120, 130, 140, 150, 160) in which the prescaler provides more than a single clock phase to the programmable divider and the programmable divider utilizes the multiple clock phases to allow operation in a true fractional-integer mode. The overall combination of the prescaler and programmable divider functions as a programmable divider for which the minimum increment in the overall divider modulus is less than the prescaler modulus, but the maximum clock frequency usable is the maximum clock frequency of the prescaler.
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公开(公告)号：EP0406366B1
公开(公告)日：1994-06-01
申请号：EP90900469.9
申请日：1989-11-14
Applicant: Hughes Aircraft Company
Inventor： COSAND, Albert, E.
CPC classification number: H03K23/665 , H03K21/10 , H03K23/667 , H03K23/68
Abstract: A programmable counter or frequency divider includes the combination of a fixed modulus prescaler (110) and a programmable divider (120, 130, 140, 150, 160) in which the prescaler provides more than a single clock phase to the programmable divider and the programmable divider utilizes the multiple clock phases to allow operation in a true fractional-integer mode. The overall combination of the prescaler and programmable divider functions as a programmable divider for which the minimum increment in the overall divider modulus is less than the prescaler modulus, but the maximum clock frequency usable is the maximum clock frequency of the prescaler.
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公开(公告)号：EP0406366A1
公开(公告)日：1991-01-09
申请号：EP90900469.0
申请日：1989-11-14
Applicant: HUGHES AIRCRAFT COMPANY
Inventor： COSAND, Albert, E.
CPC classification number: H03K23/665 , H03K21/10 , H03K23/667 , H03K23/68
Abstract: Un diviseur de fréquence ou compteur programmable comprend la combinaison d'un pré-étalonneur de module fixe (110) et d'un diviseur programmable (120, 130, 140, 150, 160), le pré-étalonneur fournissant plus d'une phase d'horloge unique au diviseur programmable et le diviseur programmable utilisant les phases d'horloge multiples pour permettre un fonctionnement dans un mode nombre fractionnaire-nombre entier. La combinaison globale du pré-étalonneur et du diviseur programmable fonctionne comme un diviseur programmable pour lequel l'incrément minimal dans le module du diviseur global est inférieur au module du pré-étalonneur, mais la fréquence d'horloge maximale utilisable est la fréquence d'horloge maximale du pré-étalonneur.
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