公开(公告)号：GB2530513A

公开(公告)日：2016-03-30

申请号：GB201416827

申请日：2014-09-24

Applicant: IBM

Inventor： VERPLANKEN FABRICE JEAN ,  ABEL FRANCOIS ,  ALDEBERT JEAN-PAUL ,  FRENOY JEAN-LUC

IPC: G06F9/30 ,  G06F9/38

Abstract: An action machine (i.e. a hardware accelerator) 400 for assembling response packets, e.g. Network Controller Sideband Interface (NC-SI) response packets, in a network processor (101, fig. 1) comprises: a first register array 405 adapted to store data for entry into fixed-length fields of differing response packets, a fixed-length field having the same length in the differing response packets (e.g. fields that are common for different NC-SI response packets); and a second register array 410 adapted to store data for entry into variable-length fields of differing response packets, a variable-length field having different values or lengths in the differing response packets (e.g. a variable-length payload). The action machine is adapted to assemble a response packet by combining data stored in the first register array with data stored in the second register array. First register array 405 may also store fields considered as being copied from a corresponding NC-SI command packet. Each byte-wide register of the first array 405 may be filled by a packet parser (207, fig. 2). A third register array 415 is adapted to stored selection data for writing data in second register array 410.