公开(公告)号：DE10034405B4

公开(公告)日：2006-09-28

申请号：DE10034405

申请日：2000-07-14

Applicant: IBM

Inventor： BAIER HEINZ

IPC: G06F11/00 ,  G06F17/50 ,  G06F9/44 ,  H03K19/173

Abstract: Programming or updating hardware electronic circuits without manually accessing the circuits is dislcosed. The circuit arrangement includes an EEPROM device, a FPGA device which is accessible via a computer bus system and a MUX element connected between said devices; a PROM device is arranged, inter alia, for comprising control data for proper recognition of the FPGA by the bus system. The MUX element can be controlled to read data from either the PROM device, EEPROM device, or FPGA device. In the method of the present invention, the FPGA is used to program the EEPROM with the schema received from a disk. The MUX is switched to be able to read from the EEPROM and feed the developed schema therein into the FPGA. The PROM is used to deliver the information to the FPGA, which is necessary for the PC-card to be recognized by the BIOS on a first start-up.

公开(公告)号：DE10034405A1

公开(公告)日：2001-03-01

申请号：DE10034405

申请日：2000-07-14

Applicant: IBM

Inventor： BAIER HEINZ

IPC: G06F11/00 ,  G06F9/44 ,  G06F17/50 ,  H03K19/173

Abstract: The method involves programming FPGAs with configuration data according to a schema developed on a computer with a development tool by reading the schema with a device driver from a memory in the computer, programming the schema into an EEPROM using a dedicated function implemented in the FPGA, switching the MUX element via which the EEPROM is connected to the computer to enable reading from the EEPROM to the FPGA and starting the configuration of the FPGA whereby the schema is read in from the EEPROM to the FPGA. Independent claims are also included for a hardware circuit and for a PC card.

公开(公告)号：CA2311420A1

公开(公告)日：2001-02-11

申请号：CA2311420

申请日：2000-06-13

Applicant: IBM

Inventor： BAIER HEINZ

IPC: G06F11/00 ,  G06F9/44 ,  G06F17/50 ,  H03K19/173 ,  G11C17/18 ,  G06F12/00

Abstract: The inventive concept comprises a method and a circuit arrangement for programming or updating hardware electronic circuits without manually accessing the circuit s. The inventive hardware circuit arrangement comprises an EEPROM device, a FPGA device which is accessible via a computer bus system and a MUX element connected between said devices. Further, in the circuit arrangement a PROM device is arranged for comprising control data for proper recognition of the FPGA by said bus syste m, and for comprising a logic usable for programming said EEPROM device with an EEPROM- FPGA interface like that of Joint Test Action Group (JTAG). The above mentioned M UX element can be controlled to select either said PROM device or said EEPROM device or said FPGA device for reading data from said devices, in order to properly connect said FPGA to said bus system and to initialize a configuration of said FPGA with the contents comprised of said EEPROM.

公开(公告)号：DE19618236A1

公开(公告)日：1996-12-12

申请号：DE19618236

申请日：1996-05-07

Applicant: IBM

Inventor： BAIER HEINZ ,  KUENZEL ULRICH DR

IPC: H02H7/18

Abstract: The invention concerns an electric circuit (5) for an electrical direct voltage source (4) accommodated in a housing (3), the live pole (6) being brought out of the housing (3) via a switching device (23) which can be controlled from outside the housing (3). The switching device (23) can be controlled, for example, by being connected to the on-off switch (21, 22) of an electrical appliance (2). If the on-off switch (21, 22) is closed, for example, by the user, the electrical switching device (23) likewise changes to its closed state such that the voltage emitted by the direct voltage source (4) can be picked up externally at the housing (3). In contrast, if the on-off switch (21, 22) is in its open state, no voltage can be picked up at the connection points (8, 12) on the outside of the housing (3). The advantage of the invention is that no short-circuits can occur between these connection points (8, 12).