Regulated Transformerless Power Supply
    1.
    发明授权
    Regulated Transformerless Power Supply 失效
    稳压无变压器电源

    公开(公告)号:US3863135A

    公开(公告)日:1975-01-28

    申请号:US37968773

    申请日:1973-07-16

    Applicant: IBM

    CPC classification number: H02M3/07

    Abstract: A transformerless direct current power supply having a regulated voltage output is disclosed. The supply uses cascaded sections of capacitive series voltage dividers in series to reduce and store full-wave recitifed DC input voltage which is then discharged in parallel at the desired output level. The charging and discharging of the cascaded capacitive series is regulated by a switching network driven by a feedback voltage derived from the output to regulate the charging of the capacitors in series and discharge of them in parallel.

    Abstract translation: 公开了一种具有调节电压输出的无变压器直流电源。 电源串联使用电容串联分压器的级联部分,以减少和存储全波朗读的直流输入电压,然后在期望的输出电平上并联放电。 级联电容串联的充放电由一个由输出端产生的反馈电压驱动的开关网络进行调节,以调节电容器的串联充电并并联放电。

    IR PULSE MODEM NRZI
    3.
    发明专利

    公开(公告)号:PL319125A1

    公开(公告)日:1997-07-21

    申请号:PL31912595

    申请日:1995-09-15

    Applicant: IBM

    Abstract: A modulation scheme and system, compatible with both the asynchronous IRDA mode and the synchronous mode of IR communication, involves Non-Return-to-Zero-Inverted (NRZI) and Flash pulse encoding in conjunction with zero-bit stuffing. A digital data stream has a zero-bit inserted therein, before NRZI format encoding, whenever five consecutive one's are detected in the stream to enable the controller to distinguish the data from flags, which are exempt from the zero-bit insertion, and to provide enough transitions in the data so that the demodulator's digital phase lock loop can stay locked independent of the data contents. A Flash pulse (of from +E,fra 3/16+EE to +E,fra 8/16+EE of bit cell width, depending on the data rate) is generated whenever a transition is detected in the NRZI formatted data. The result, in keeping with IRDA modulation, is that a Flash pulse is generated whenever a zero occurs in the data stream. On the demodulation side, whenever a Flash pulse is received, the level of the receive line is toggled resulting in an output in NRZI format. Using this modulation scheme with a serial controller which supports NRZI and bit-stuffing, a system may be constructed that uses the controller's phase lock loop to send and receive data synchronously.

    Modulation method for communications and apparatus for making the same

    公开(公告)号:CZ9700999A3

    公开(公告)日:2002-07-17

    申请号:CZ99997

    申请日:1995-09-15

    Applicant: IBM

    Abstract: A modulation scheme and system, compatible with both the asynchronous IRDA mode and the synchronous mode of IR communication, involves Non-Return-to-Zero-Inverted (NRZI) and Flash pulse encoding in conjunction with zero-bit stuffing. A digital data stream has a zero-bit inserted therein, before NRZI format encoding, whenever five consecutive one's are detected in the stream to enable the controller to distinguish the data from flags, which are exempt from the zero-bit insertion, and to provide enough transitions in the data so that the demodulator's digital phase lock loop can stay locked independent of the data contents. A Flash pulse (of from +E,fra 3/16+EE to +E,fra 8/16+EE of bit cell width, depending on the data rate) is generated whenever a transition is detected in the NRZI formatted data. The result, in keeping with IRDA modulation, is that a Flash pulse is generated whenever a zero occurs in the data stream. On the demodulation side, whenever a Flash pulse is received, the level of the receive line is toggled resulting in an output in NRZI format. Using this modulation scheme with a serial controller which supports NRZI and bit-stuffing, a system may be constructed that uses the controller's phase lock loop to send and receive data synchronously.

    METHOD AND CIRCUIT ARRANGEMENT FOR CODING INFRARED SIGNALS

    公开(公告)号:HU76995A2

    公开(公告)日:1998-01-28

    申请号:HU9700409

    申请日:1995-09-15

    Applicant: IBM

    Abstract: A modulation scheme and system, compatible with both the asynchronous IRDA mode and the synchronous mode of IR communication, involves Non-Return-to-Zero-Inverted (NRZI) and Flash pulse encoding in conjunction with zero-bit stuffing. A digital data stream has a zero-bit inserted therein, before NRZI format encoding, whenever five consecutive one's are detected in the stream to enable the controller to distinguish the data from flags, which are exempt from the zero-bit insertion, and to provide enough transitions in the data so that the demodulator's digital phase lock loop can stay locked independent of the data contents. A Flash pulse (of from +E,fra 3/16+EE to +E,fra 8/16+EE of bit cell width, depending on the data rate) is generated whenever a transition is detected in the NRZI formatted data. The result, in keeping with IRDA modulation, is that a Flash pulse is generated whenever a zero occurs in the data stream. On the demodulation side, whenever a Flash pulse is received, the level of the receive line is toggled resulting in an output in NRZI format. Using this modulation scheme with a serial controller which supports NRZI and bit-stuffing, a system may be constructed that uses the controller's phase lock loop to send and receive data synchronously.

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