公开(公告)号：GB2508122B

公开(公告)日：2014-10-29

申请号：GB201404419

申请日：2012-09-14

Applicant: IBM

Inventor： BHOO-VARAGHAN BHAVANA ,  FAROOQ MUKTA G ,  KINSER EMILY R ,  SAROOP SUDESH

IPC: H01L21/66 ,  H01L23/58

Abstract: A method of testing a semiconductor substrate having through substrate vias for current leakage which includes: forming a current leakage measurement structure that includes substrate contacts, sensing circuits to sense current leakage from the through substrate vias, the sensing circuits connected to the through substrate vias and to the substrate contacts so that there is a one-to-one correspondence of a substrate contact and sensing circuit to each through substrate via, and a built-in self test (BIST) engine to sense one of the through substrate vias for current leakage. A reference current is applied to the sensing circuits to set a current leakage threshold for the through substrate vias. A through substrate via is selected for sensing for current leakage. The sensing circuit senses the selected through substrate via to determine whether there is current leakage from the selected through substrate via.

公开(公告)号：GB2508122A

公开(公告)日：2014-05-21

申请号：GB201404419

申请日：2012-09-14

Applicant: IBM

Inventor： BHOO-VARAGHAN BHAVANA ,  FAROOQ MUKTA G ,  KINSER EMILY R ,  SAROOP SUDESH

IPC: H01L21/66 ,  H01L23/58

Abstract: A leakage measurement structure for through substrate vias which includes a semiconductor substrate; a plurality of through substrate vias in the semiconductor substrate extending substantially through the semiconductor substrate; and a leakage measurement structure located in the semiconductor substrate. The leakage measurement structure includes a plurality of substrate contacts extending into the semiconductor substrate; a plurality of sensing circuits connected to the plurality of through substrate vias and to the plurality of the substrate contacts, the plurality of sensing circuits providing a plurality of outputs indicative of current leakage from the plurality of through substrate vias; a built-in self test (BIST) engine to step through testing of the plurality of through substrate vias; and a memory coupled to the BIST engine to receive the outputs from the plurality of sensing circuits. Also included is a method of testing a semiconductor substrate.