公开(公告)号：DE3167577D1

公开(公告)日：1985-01-17

申请号：DE3167577

申请日：1981-06-03

Applicant: IBM

Inventor： BOLCAVAGE RICHARD DONALD ,  HRYCK MICHAEL DAVID ,  KAUCZKA WILLIAM BERNARD ,  KINTER HAROLD BLAINE

IPC: B41J9/44 ,  B41J1/20 ,  B41J9/54 ,  B41J29/393 ,  G06K15/07 ,  G06K15/08 ,  G06F3/12 ,  B41J9/00

Abstract: A method and apparatus for testing print elements of a printer, such as a belt printer, in which the print element operating circuits are energized at an energy level insufficient to cause printing but sufficient to generate feedback signals for checking operativeness by a microprocessor.

公开(公告)号：DE3160186D1

公开(公告)日：1983-05-26

申请号：DE3160186

申请日：1981-01-08

Applicant: IBM

Inventor： BOLCAVAGE RICHARD DONALD ,  FERRARO ARMAND JOSEPH ,  FLEEK ARTHUR EDWIN

IPC: B41J9/54 ,  B41J7/96 ,  B41J9/52 ,  G06F11/10 ,  G06K15/06 ,  G06K15/08 ,  B41J9/26 ,  G06F3/12

Abstract: A printer control system for a belt printer has an arrangement for checking print hammer operating circuits by comparing a real time actual parity of the circuits with a precalculated expected parity. Prior to printing, a microprocessor calculates expected parity bytes for each subscan for storage in a storage device along with the print position fire data used for selecting the operating circuits to be activated in the related subscans. An actual parity byte is generated on a real time basis by ODD/EVEN parity circuits associated with groups of operating circuits for comparison with a composite parity byte generated each subscan by the microprocessor. The composite parity byte is generated by combining the expected parity bytes from the storage device for several successive subscans. The composite parity byte is updated each subscan by a process of subtracting the initial expected parity byte and adding a new subscan expected parity byte. Comparison is made when all the activating circuits are in stable condition.

公开(公告)号：DE3176771D1

公开(公告)日：1988-07-07

申请号：DE3176771

申请日：1981-01-08

Applicant: IBM

Inventor： BOLCAVAGE RICHARD DONALD ,  FLEEK ARTHUR EDWIN ,  MARCUS MITCHELL PAUL

IPC: B41J1/20 ,  B41J7/36 ,  G06F3/12 ,  G06K15/08

公开(公告)号：DE3171638D1

公开(公告)日：1985-09-12

申请号：DE3171638

申请日：1981-01-27

Applicant: IBM

Inventor： BOLCAVAGE RICHARD DONALD ,  FERRARO ARMAND JOSEPH ,  FLEEK ARTHUR EDWIN

IPC: G06F3/12 ,  B41J1/20 ,  B41J5/30 ,  B41J7/36 ,  B41J29/38 ,  G06K15/07 ,  G06K15/08

Abstract: A belt printer control system for attachment to a host system (10) has a first microprocessors (MPU1) connected by a dedicated bus (64) to the host system (10) and control elements (PTM1, PTM2, P1A) operable to perform carriage control, belt drive, and ribbon drive operations of the printer mechanism. A second microprocessor (MPU2) is connected by a dedicated bus structure (80) to controls (90, 91, 26) for operating the print hammers (24). A common RAM (43) is accessed by the two microprocessors (MPU1, MPU2) through a common bus structure (81, 82). The first microprocessor (MPU1) passes control and print information to the RAM (43) for use by the second microprocessor (MPU2) in building print algorithm tables in the RAM (43) for use by the second microprocessor (MPU2) to operate the print hammers (24). Communication between the microprocessors is done through control information stored by the microprocessors in the common RAM. Storing printing information and building of tables and controlling printing and non-printing operations of the print mechanism are done concurrently.