1.
    发明专利
    未知

    公开(公告)号:AT479947T

    公开(公告)日:2010-09-15

    申请号:AT08761364

    申请日:2008-06-25

    Applicant: IBM

    Abstract: A memory module contains a first interface for receiving data access commands and a second interface for re-transmitting data access commands to other memory modules, the second interface propagating multiple copies of received data access commands to multiple other memory modules. The memory module is preferably used in a high-capacity memory subsystem organized in a tree configuration in which data accesses are interleaved. Preferably, the memory module has multiple-mode operation, one of which supports multiple replication of commands and another of which supports conventional daisy-chaining.

    2.
    发明专利
    未知

    公开(公告)号:AT467182T

    公开(公告)日:2010-05-15

    申请号:AT07703995

    申请日:2007-01-18

    Applicant: IBM

    Abstract: A computer system having patrol snoop sequencer that sequences through addresses of cache lines held in a higher level cache, making snoop reads using those addresses to a lower level cache. If a particular cache line held in the higher level cache is not held in the lower level cache, the particular cache line is identified as an eviction candidate in the higher level cache when a new cache line must be loaded into the higher level cache.

    3.
    发明专利
    未知

    公开(公告)号:AT367606T

    公开(公告)日:2007-08-15

    申请号:AT04787128

    申请日:2004-09-10

    Applicant: IBM

    Abstract: Methods and apparatus are provided that allow an electronic system having a signaling bus with a fault on a signaling conductor to operate at a degraded performance. A block of data is transferred from a first electronic unit to a second electronic unit over the signaling bus. A transmission sequence sends the block of data using all of the nonfaulty signaling conductors using a minimum number of beats required to complete the transmission.

Patent Agency Ranking