BYTE WRITE CAPABILITY FOR MEMORY ARRAY

    公开(公告)号:CA2229385A1

    公开(公告)日:1998-09-24

    申请号:CA2229385

    申请日:1998-02-13

    Applicant: IBM

    Abstract: A method and device for selectively writing to portions of a memory word which i s cleared during the write operation. Information from all of the bytes in a memor y word are stored in a temporary space (a cache) prior to clearing the memory word, and the reafter, a portion of the stored information is written to at least one of the bytes in t he memory word, and new information is written to at least one other byte in the memory wo rd. The writing steps are accomplished using at least one multiplexer which selectively writes either stored information or new information in response to a control signal from the p rocessor. The temporary space (cache) includes a latch for each memory cell, and the multi plexer includes an enable line having on and off states, such that the multiplexer writ es information stored in a latch to the memory word if the enable line is in its of f state, but writes new information to the memory word if the enable line is in its on state. The memory word can be one of a plurality of memory words in the memory device (RAM), and t he memory word is accessed using an addressable word line.

Patent Agency Ranking