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    EMBEDDED DECOUPLING CAPACITOR
    1.
    发明申请
    EMBEDDED DECOUPLING CAPACITOR 审中-公开
    嵌入式解耦电容器

    公开(公告)号：WO0207221A3

    公开(公告)日：2002-06-13

    申请号：PCT/EP0108044

    申请日：2001-07-12

    Applicant: IBM ,  IBM DEUTSCHLAND

    Inventor： ALLEN ARCHIBALD J ,  BULA OREST ,  COHN JOHN M ,  COLE DANIEL ,  CONRAD EDWARD W ,  LEIPOLD WILLIAM C

    IPC: H01L21/822 ,  H01L21/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/105 ,  H01L27/12 ,  H01L27/02

    CPC classification number: H01L27/105 ,  H01L27/0629 ,  H01L28/60

    Abstract: A structure for a semiconductor chip which includes a first region having first cells for storing and processing data, and a second region outside the first region having OPC structures, wherein the OPC structures comprise decoupling capacitors. The line widths of the active gates of first cells are the same size or similar in size as the OPC structures. The OPC structures reduce proximity effects of active devices in the first cells, and comprise N-type FETs and P-type FETs, that are located in the second region. The OPC structures may have a width greater than the first cells. The second region can be multiple OPC structures, whereby the second region comprises multiple decoupling capacitors. The active devices in the first cells are separated by a first distance and the OPC structures are separated from the active devices by the first distance.

    Abstract translation: 一种用于半导体芯片的结构，包括具有用于存储和处理数据的第一单元的第一区域和具有OPC结构的第一区域外部的第二区域，其中所述OPC结构包括去耦电容器。 第一单元的有源栅极的线宽与OPC结构具有相同的尺寸或相似的尺寸。 OPC结构减少了第一单元中的有源器件的邻近效应，并且包括位于第二区域中的N型FET和P型FET。 OPC结构可以具有比第一单元更大的宽度。 第二区域可以是多个OPC结构，由此第二区域包括多个去耦电容器。 第一单元中的有源器件以第一距离分开，并且OPC结构与有源器件分开第一距离。

    SEMICONDUCTOR DEVICE HAVING EMBEDDED DECOUPLING CAPACITOR
    3.
    发明专利
    SEMICONDUCTOR DEVICE HAVING EMBEDDED DECOUPLING CAPACITOR 审中-公开

    公开(公告)号：JP2002083873A

    公开(公告)日：2002-03-22

    申请号：JP2001209910

    申请日：2001-07-10

    Applicant: IBM

    Inventor： ALLEN ARCHIBALD J ,  BULA OREST ,  COHN JOHN M ,  COLE DANIEL ,  CONRAD EDWARD W ,  LEIPOLD WILLIAM C

    IPC: H01L21/822 ,  H01L21/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/105 ,  H01L27/12

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor chip structure and a method for integrating a decoupling capacitor and an OPC structure. SOLUTION: The semiconductor chip structure is provided with a first area having a first cell for storing and processing data, and a second region outside the first region having the OPC structure provided with the decoupling capacitor. The line width of the active gate of the first cell is the same size as or size almost similar to the OPC structure. The OPC structure reduces the proximity effect of an active device in the first cell and is provided with N-type and P-type FET located in the second region. The OPC structure has a width greater than the first cell as well. The second region is composed of multiple OPC structure so that the second region is provided with multiple decoupling capacitors. The active device in the first cell is separated by a first distance, and the OPC structure is separated from the active device by the first distance.

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