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Patent Agency Ranking
公开(公告)号：CA1294380C
公开(公告)日：1992-01-14
申请号：CA563038
申请日：1988-03-31
Applicant: IBM
Inventor： HARRISON ROY B , BUTLER NICHOLAS D , BOWATER RONALD J , NORRIS PAUL W
Abstract: UK9-87-008 DISPLAY SYSTEM The present invention relates to a display system comprising a display buffer 36 data indicative of picture elements with a facility for moving an image from a source to a destination position by manipulating the data in the display buffer. The present invention provides this facility by having means for reading, processing and Storing bursts of display buffer words. In the described embodiment of the invention control logic 44 first causes a burst of display buffer words containing bytes representative of the image in its source position to be read out from the display buffer. These words are passed through a barrel shifter 66, where the word is rotated as necessary and stored in appropriate byte locations in a FIFO buffer 68. The FIFO buffer has the capability to write to two word addresses simultaneously so that data words are created in the FIFO buffer which contain data in the correct alignment for writing unmodified into the corresponding display buffer words. When the source has been completely read or the buffer is full (whichever comes first) the display adapter automatically switches from reading to writing and stores the burst of data words it has in its FIFO buffer into memory at the destination locations.
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公开(公告)号：CA2021830C
公开(公告)日：1995-01-10
申请号：CA2021830
申请日：1990-07-24
Applicant: IBM
Inventor： BUTLER NICHOLAS D , GAY ADRIAN C
Abstract: DISPLAY SYSTEM A computer graphics system is presented, having display logic (92) comprising a destination bit map (11) containing a plurality of image bits which map to a plurality of pixels for presenting an image, an auxiliary bit map (1) containing a plurality of area boundary bits representing pixels defining an area boundary line which encloses an area of the image, area filling logic (7) for operating upon those image bits enclosed by the area boundary line in order to fill the area with a particular pattern and colour, characterised in that the display logic further comprises area boundary drawing logic (5) having line segmentation means to resolve the specified boundary line into a plurality of intersecting two pixel line segments which can, from that time forward, be operated upon separately to define the area boundary bits in accordance with conventional area boundary drawing rules.
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公开(公告)号：CA1309199C
公开(公告)日：1992-10-20
申请号：CA579392
申请日：1988-10-05
Applicant: IBM
Inventor： BUTLER NICHOLAS D , HOMEWOOD BRIAN C , LARKY STEVEN P
IPC: G06F3/153 , G06T9/00 , G09G1/00 , G09G1/02 , G09G5/00 , G09G5/36 , G09G5/39 , G09G5/395 , G09G1/16
Abstract: BIT GATING FOR EFFICIENT USE OR RAMS IN VARIABLE PLANE DISPLAYS Apparatus for serializing 2M parallel outputs of an all points addressable memory into successive data groups, each data group corresponding to a respective value for a pixel in an image wherein the bit-length of the pixel value is selectable, the apparatus comprising: a gate circuit having (i) 2M parallel input junctions connected to the outputs of the memory and (ii) 2N output junctions, wherein the gate circuit selectively converts each set of 2M parallel inouts at said input junctions into 2M-n successive data groups, each group having a bit-length of 2n bits, wherein each group is transmitted to 2n of the 2N out put junctions; and a communication element for conveying to the gate circuit a signal which controls the bit-length 2n of data groups, wherein n is an integer 1 ? n ? N ? M.
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公开(公告)号：CA1304524C
公开(公告)日：1992-06-30
申请号：CA573164
申请日：1988-07-27
Applicant: IBM
Inventor： BUTLER NICHOLAS D , GAY ADRIAN C , BRESENHAM JACK E
Abstract: LINE GENERATION IN A DISPLAY SYSTEM The present invention concerns a line generator and a method for determining the individual pixels to be plotted for a line to be drawn in a display system. Coded representations of a plurality of lines are stored in a line definition table, the coded representation of each individual line comprising a string of data items representing the transitions between adjacent pixels to be plotted for drawing said individual line. Preferably, only coded representations of lines up to a predetermined size (ie. the length of the line in the case of a straight line) are stored in the line definition table and strings of data items for representing the pixels to be plotted for longer lines to be drawn are still calculated as in the prior art. In this case, means are provided for determining whether there are coded representations of a line to be drawn in the line definition table, or not, and for passing control to the appropriate logic for determining the pixels to be plotted. In a preferred embodiment, the string of data items forming the coded representation of a line to be drawn is a string of binary digits and the value of each bit in the string represents a transition in one of two directions. This provides a very compact representation of the line.
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公开(公告)号：CA2000005A1
公开(公告)日：1990-08-27
申请号：CA2000005
申请日：1989-10-02
Applicant: IBM
Inventor： BUTTIMER MALCOLM D , GAY ADRIAN C , BUTLER NICHOLAS D , BATES MATTHEW D , KIM JONG H
Abstract: DATA PROCESSOR A data processor comprises storage for each of first, second and third values, a processor condition register for processor condition codes and logic for decoding instructions including a specific instruction defining an operation between the first value and either the second value or the third value. The selection of the second or the third value is made by the processor in dependence on the state of the processor condition code. The invention is of particular, but not exclusive application for the plotting of lines in a display system. In an example of a display system incorporating such a data processor, a pixel can be plotted on each processor instruction cycle. UK9-89-003
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