公开(公告)号：DE3751392D1

公开(公告)日：1995-08-10

申请号：DE3751392

申请日：1987-04-10

Applicant: IBM

Inventor： CHAN PATRICK MENG-HO ,  CHEN SHIN CHUNG

IPC: G11B20/14 ,  G11B20/18

Abstract: The width of the data window in a magnetic storage device is controllably varied in order to perform comparative data detection error rate measurements thereon is provided. More particularly, apparatus for obtaining a measure of data detection error in devices for detecting data signals, comprises: first means (9) for producing unambiguously defined timing signals in response to data signals; second means (11, 15) coupled to the first means for producing test signals including pulses having constant width in response to the timing and data signals; third means (15, 17), coupled to the first means, for producing control signals for controlling the width of a test window with respect to the timing signals; and fourth means (18), coupled to the second and third means, for producing a test window by selectively accepting or rejecting test signal pulses in response to the control signals. A continuously variable stressed data window can be generated symmetrically within, and in locked phase with, the full data window under the control of a single current digital-to-analog converter (DAC) in a voltage controlled oscillator (VCO).

公开(公告)号：DE3751392T2

公开(公告)日：1996-03-07

申请号：DE3751392

申请日：1987-04-10

Applicant: IBM

Inventor： CHAN PATRICK MENG-HO ,  CHEN SHIN CHUNG

IPC: G11B20/14 ,  G11B20/18

Abstract: The width of the data window in a magnetic storage device is controllably varied in order to perform comparative data detection error rate measurements thereon is provided. More particularly, apparatus for obtaining a measure of data detection error in devices for detecting data signals, comprises: first means (9) for producing unambiguously defined timing signals in response to data signals; second means (11, 15) coupled to the first means for producing test signals including pulses having constant width in response to the timing and data signals; third means (15, 17), coupled to the first means, for producing control signals for controlling the width of a test window with respect to the timing signals; and fourth means (18), coupled to the second and third means, for producing a test window by selectively accepting or rejecting test signal pulses in response to the control signals. A continuously variable stressed data window can be generated symmetrically within, and in locked phase with, the full data window under the control of a single current digital-to-analog converter (DAC) in a voltage controlled oscillator (VCO).