公开(公告)号：JP2003186741A

公开(公告)日：2003-07-04

申请号：JP2002346968

申请日：2002-11-29

Applicant: IBM

Inventor： CHIAROT KEVIN A ,  MAYFIELD MICHAEL J ,  NANGIA ERA K ,  PETERSON MILFORD J

IPC: G06F9/38 ,  G06F12/08 ,  G06F12/10

Abstract: PROBLEM TO BE SOLVED: To provide a method that selectively prefetches a line M+1 from an L2 cache or a main memory to an L1 instruction cache when executing a line M. SOLUTION: If an unresolved branch exists in the unsettled line M, the line M+1 being predictive is prefetched not from the main memory but from the L2 cache to the L1 instruction cache. The unresolved branch in the unsettled line M is resolved before the line M+1 is prefetched from the main memory. If an unresolved branch does not exist, the line M is committed and prefetched from the main memory. As above, potentially useless prefetching is not performed, thus holding the bandwidth of the main memory. COPYRIGHT: (C)2003,JPO