公开(公告)号：AU4776979A

公开(公告)日：1979-12-13

申请号：AU4776979

申请日：1979-06-05

Applicant: IBM

Inventor： COLLINS THOMAS WILLIAM

IPC: G11C11/14 ,  G11C19/08 ,  H03K17/84 ,  H03K19/168

Abstract: A magnetic bubble switch operates in a drive-to-transfer mode when a rotating magnetic field is applied. The switch has a magnetic element in the shape that defines the letter "Y" having two arms and a stem. The switch has at least one serration on the arm of the Y in the vicinity of the stem. The switch has a conductor which is positioned across the end of the stem of the Y. A magnetic element is positioned so as to form a gap with the stem of the Y.

公开(公告)号：DE3278258D1

公开(公告)日：1988-04-21

申请号：DE3278258

申请日：1982-05-14

Applicant: IBM

Inventor： COLLINS THOMAS WILLIAM ,  HURLEY MICHAEL GARWOOD

IPC: G11C11/14 ,  G11C19/08

Abstract: A major/minor loop bubble memory system includes a passive replicator (34) in the major loop read channel (33) which is connected by a first path (42) to a mode switch-annihilator (44) and a merge point in the major loop write channel (30) and by a second path (36) to an off-chip decision-making means (38) and the merge point in the write channel. The decision-making means (38) is positioned the same or fewer propagation steps than the mode switch-annihilator (44) is from the replicator (34). The decision-making means (38) is activated to cause either the replicated data to pass through the mode switch-annihilator (44) into the write channel or the replicated data to be annihilated in the mode switch-annihilator and the data from a generator (40) to pass into the write channel.

公开(公告)号：DE3063249D1

公开(公告)日：1983-07-07

申请号：DE3063249

申请日：1980-03-20

Applicant: IBM

Inventor： COLLINS THOMAS WILLIAM ,  MEHTA KAY BHARAT

IPC: G11C11/14 ,  G11C19/08

公开(公告)号：DE2653688A1

公开(公告)日：1977-07-14

申请号：DE2653688

申请日：1976-11-26

Applicant: IBM

Inventor： COLLINS THOMAS WILLIAM ,  HENSE KARL RAYMOND

IPC: H03H15/02 ,  G11C19/28 ,  G11C27/04 ,  H01L21/339 ,  H01L29/762 ,  H01L29/768 ,  H03H11/26 ,  H01L29/66 ,  H01L31/08 ,  G11C11/24

Abstract: Operating circuitry for linear charge launching, non-destructive weighting and non-destructive charge sensing for Charge Coupled Devices (CCD) employs electronic integrating circuitry at the input and output node terminals of the CCD. Feedback circuitry within the integrating circuitry aids in linearizing the signals, in eliminating the non-linear capacitance effect of the depletion regions, and in freeing the design from device parameter variations such as electrode area and absolute values of threshold potential and thickness of insulating layer. The circuitry is adaptable to most conventional CCD and is readily made up of conventional resistance and capacitance elements, of conventional comparing circuits such as differential amplifying or signal repeating circuits, and of conventional summing circuitry.