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公开(公告)号：JPH11145848A
公开(公告)日：1999-05-28
申请号：JP22881298
申请日：1998-08-13
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: PROBLEM TO BE SOLVED: To provide improved method and device for compressing data. SOLUTION: This method for providing improved data compression efficiency is disclosed for a data compressor. Before a non-compressed data stream is transmitted to a data compression unit, first an incoming data byte from the non-compressed data stream is compared with a preceding data byte from the non-compressed data stream. In response to the coincidence of incoming data byte and preceding data byte, a first counter value is incremented. After the first counter value reaches a preset value, in response to the following matching of incoming data byte and preceding data byte, a second counter value is incremented. When the incoming data byte is completely run, in place of that run part, the second counter value is finally transmitted to the data compression unit. Thus, after the generation of run inside the non-compressed data stream, the data compression unit can speedily restart the optimum compressibility.
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公开(公告)号：JP2005018770A
公开(公告)日：2005-01-20
申请号：JP2004184034
申请日：2004-06-22
Applicant: Internatl Business Mach Corp
, インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation Inventor： CRAFT DAVID JOHN , DAY MICHAEL NORMAN , HOFSTEE HARM PETER , JOHNS CHARLES RAY , LIBERTY JOHN SAMUEL
CPC classification number: G06F21/53 , H04L9/3226 , H04L2209/56
Abstract: PROBLEM TO BE SOLVED: To provide authentication of either code or data or both, and protected execution environments. SOLUTION: For authentication of code or data, a local storage is dynamically divided and division cancelled. The local storage is divided into an isolated section and a non-isolated section. The code or the data are loaded in the isolated section. Either the code or the data are authenticated in the isolated section of the local storage. After the authentication, the code is executed. After the execution, a memory within the isolated section of an attached processor unit, and the attached processor unit performs division cancellation with the isolated section within the local storage. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：提供代码或数据或两者的认证，以及受保护的执行环境。
解决方案：对于代码或数据的验证，本地存储器被动态划分并分割。 本地存储分为隔离区段和非隔离区段。 代码或数据被加载到隔离的部分。 代码或数据在本地存储的隔离部分进行身份验证。 认证后，执行代码。 在执行之后，附接的处理器单元的隔离部分内的存储器，以及所附加的处理器单元使用本地存储器内的隔离部分进行分离消除。 版权所有（C）2005，JPO＆NCIPI
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公开(公告)号：GB1268283A
公开(公告)日：1972-03-29
申请号：GB1555370
申请日：1970-04-02
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: 1,268,283. Data processing; data stores. INTERNATIONAL BUSINESS MACHINES CORP. 2 April, 1970, No. 15553/70. Headings G4A and G4C. A connect module comprises a plurality of groups of data input-output (I/O) conductors, a respective I/O register connected to each group of I/O conductors, parity generating circuits for generating the parity of data in the I/O registers, a plurality of data highways, and means for connecting any I/O register to any data highway whereby data can be transferred between selected I/O registers. The parity generating circuits are also used in parity checking. The module also contains a multi-row store each row of which can receive the contents of all the I/O registers, or load all the I/O registers. A shift register having a bit position for each row specifies which row or rows are to be accessed when read or write occurs, write being into each of the specified rows, and read being from all of the specified rows simultaneously with ORing of corresponding bits. The shift register can be loaded in parallel from outside the module and shifted in either direction. The module is controlled by microprogramme control signals from outside the module. Transfer in both directions between the I/O registers and the groups of I/O conductors (leading out of the module) is controlled for the different I/O registers independently. Several such modules can be connected for operation in turn or together, or an arrangement of such modules may interface between a main-store data register and the rest of a data processing system so as to provide control and diagnostic microinstructions read from the main store on different groups of conductors since the decoding required is different. A modified module also includes a module function control register which can be loaded from the multi-row store or the I/O registers, to control the module. Inter alia, bits transferred can be selectively inverted. The control register also specifies a direct address, a base address, a mask and the identity of an I/O register. A conditional address is constructed by obtaining each bit from the corresponding position of either this I/O register or of the base address, according to the corresponding bit of the mask. Either the direct or the conditional address is used to address the multi-row store to load the next control word into the control register, and the other address is used to address the multi-row store if a read or write function is called for during the next cycle. A modification (with a smaller multi-row store) has a bit in the control register to select half of the selected I/O register for use in forming the conditional address. Another modification uses control bits to select I/O registers whose contents are ORed to provide bits for the formation of the conditional address. The control register can be preloaded serial-by-bit from outside the module. Another modified module includes an I/O control register for each I/O register, loadable initially only and not when in use. Loading is serial-by-bit, the registers being connected serially as a shift register. Each I/O control register has a respective control line from outside the module to cause the respective I/O register to obey the command(s) in the I/O control register or not. Alternatively, three control registers can be provided for each I/O register, one or none being selected by external control signals to control the I/O register. I/O control registers can also be provided in the embodiment using the module function control register (see above) the latter register specifying for each I/O register separately whether it is to be controlled by a respective field of the module function control register, or by a first or a second further field of the latter register, or by one of the I/O control registers (which being specified). The data highways referred to above can OR corresponding bits of a plurality of I/O registers read out on to them together.
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公开(公告)号：DE69833094T2
公开(公告)日：2006-08-31
申请号：DE69833094
申请日：1998-09-14
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: A method for providing improved data compression efficiency to a data compressor unit is disclosed. Before sending the uncompressed data stream to the data compressor unit, an incoming data byte from the uncompressed data stream is first compared with a preceding data byte from the uncompressed data stream. A first counter value is incremented in response to a match between the incoming data byte and the preceding data byte. A second counter value is then incremented in response to subsequent matches between an incoming data byte and its preceding data byte after the first counter value has reached a preset value. The second counter value is finally sent to the data compressor unit at the completion of a run of the incoming data byte in substitution of a portion of the run. such that the data compressor unit can quickly resume its optimal compression ratio after an occurrence of the run within the uncompressed data stream.
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公开(公告)号：DE2313724A1
公开(公告)日：1973-10-25
申请号：DE2313724
申请日：1973-03-20
Applicant: IBM
Inventor： CRAFT DAVID JOHN
IPC: G06F9/46 , G06F13/26 , G06F13/374 , G06F3/04
Abstract: An access control system and method is disclosed in which a plurality of communication stations contend for access to a communications channel. Each remote station is provided with a priority access number and with a means for comparing its number with those of any contending stations then requesting access to the communication channel to determine which station will be given first access thereto.
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Patent Agency Ranking
公开(公告)号：SG66494A1
公开(公告)日：1999-07-20
申请号：SG1998003740
申请日：1998-09-18
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: A method for providing improved data compression efficiency to a data compressor unit is disclosed. Before sending the uncompressed data stream to the data compressor unit, an incoming data byte from the uncompressed data stream is first compared with a preceding data byte from the uncompressed data stream. A first counter value is incremented in response to a match between the incoming data byte and the preceding data byte. A second counter value is then incremented in response to subsequent matches between an incoming data byte and its preceding data byte after the first counter value has reached a preset value. The second counter value is finally sent to the data compressor unit at the completion of a run of the incoming data byte in substitution of a portion of the run. such that the data compressor unit can quickly resume its optimal compression ratio after an occurrence of the run within the uncompressed data stream.
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公开(公告)号：AU4218672A
公开(公告)日：1973-11-15
申请号：AU4218672
申请日：1972-05-11
Applicant: IBM
Inventor： JONES JOHN WYN , TAYLOR KEITH GRAHAM , CRAFT DAVID JOHN
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公开(公告)号：DE69833094D1
公开(公告)日：2006-03-30
申请号：DE69833094
申请日：1998-09-14
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: A method for providing improved data compression efficiency to a data compressor unit is disclosed. Before sending the uncompressed data stream to the data compressor unit, an incoming data byte from the uncompressed data stream is first compared with a preceding data byte from the uncompressed data stream. A first counter value is incremented in response to a match between the incoming data byte and the preceding data byte. A second counter value is then incremented in response to subsequent matches between an incoming data byte and its preceding data byte after the first counter value has reached a preset value. The second counter value is finally sent to the data compressor unit at the completion of a run of the incoming data byte in substitution of a portion of the run. such that the data compressor unit can quickly resume its optimal compression ratio after an occurrence of the run within the uncompressed data stream.
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公开(公告)号：SG65785A1
公开(公告)日：1999-06-22
申请号：SG1998003739
申请日：1998-09-18
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: A method for encoding an input data stream of source symbols to produce an output sequence of pointers is disclosed. A LITERAL string in an input data stream is first loaded into a history-buffer. A value of a history-buffer pointer is copied to a register to indicate a starting position of the LITERAL string within the history-buffer. A counter is incremented for each subsequent LITERAL symbol from the input data stream. Then, the LITERAL string and each subsequent LITERAL symbol from the input data stream is encoded utilising a value within the register and a value within the counter as a LITERAL_POINTER. Finally, the LITERAL_POINTER is outputted from a data compressor.
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公开(公告)号：SG65784A1
公开(公告)日：1999-06-22
申请号：SG1998003724
申请日：1998-09-18
Applicant: IBM
Inventor： CRAFT DAVID JOHN
Abstract: A method for encoding an input data stream of source symbols to produce an output sequence of pointers is disclosed. An initial part of the input data stream is encoded as a LITERAL_POINTER by a compressor. A LITERAL_POINTER includes at least one data byte from the data stream. A subsequent part of the input data stream is encoded as a COPY_POINTER. The COPY_POINTER includes a count and a displacement pointing to a history-buffer within the compressor. All succeeding data bytes from the input data stream are encoded as LITERAL_POINTERs and COPY_POINTERs in an alternating fashion, such that an encoded output sequence output by the compressor includes a string of pointers alternating between LITERAL_POINTERs and COPY_POINTERs.
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