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公开(公告)号：ES2164137T3
公开(公告)日：2002-02-16
申请号：ES95306104
申请日：1995-08-31
Applicant: IBM
Inventor： CRUMP DWAYNE T , PANCOAST STEVEN T , BENSON IV PAUL H
Abstract: The present invention relates to a computer system having a CPU, a power management processor, a switch, an external signal reception means such as a modem, a timer, and a power supply in circuit communication. Optionally the system may also include an override circuit and a glitch circuit. The power supply has several power supply states, which are controlled by the power management processor responsive to the CPU, the switch, the modem, the timer, the glitch circuit, the override circuit, and the power management processor itself.
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公开(公告)号：DE69523527D1
公开(公告)日：2001-12-06
申请号：DE69523527
申请日：1995-08-31
Applicant: IBM
Inventor： CRUMP DWAYNE T , PANCOAST STEVEN T , BENSON IV PAUL H
Abstract: The present invention relates to a computer system having a CPU, a power management processor, an external signal reception means such as a modem, and a power supply in circuit communication. The power management processor controls the regulation of power to the CPU by the power supply. In preferred embodiments, responsive to a ring signal having a frequency in a predetermined range being detected by the power management processor, the power management processor causes the power supply to provide regulated power to the computer system. Thereafter, the CPU preferably confirms that a ring signal was present by querying the modem to determine whether the modem also detected a ring. If so, the system remains powered. If not, the CPU causes the power management controller to cause the power supply to cease providing regulated power.
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公开(公告)号：BR9402942A
公开(公告)日：1995-06-20
申请号：BR9402942
申请日：1994-07-26
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T
Abstract: A computer system having four states of power management: a normal operating state, a standby state, a suspend state, and an off state. The standby state is characterized by devices, such as a video controller and a hard drive, being placed into a low-power mode transparent to the operating system and the applications executing on the computer system. The suspend state is characterized by executing code being interrupted and the state of the computer system being saved to a file on the hard drive in such a manner that system power may be removed after the state of the computer system is saved to the hard drive. Later, after system power is restored, the state of the computer system is resumed by reading from the hard drive and loading it in such a manner that the operating system and application programs are not adversely affected. The normal operating state and the off state correspond to the typical on and off states of more conventional computer systems. The suspend/resume/standby feature is implemented at a low cost using many standard components.
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公开(公告)号：DE69431275T2
公开(公告)日：2003-05-22
申请号：DE69431275
申请日：1994-06-30
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T , KOZEL JERRY T , CLARK MICHAEL W
Abstract: A computer system having a suspend/resume capability in addition to the normal operating state and the off state. Closure events of single momentary pushbutton switch control changes between the normal operating state, the suspend state, and the off state, depending on the value of a flag. If the flag is set in a certain state, closure events of the switch cause the computer system to change back and forth between the normal operating state and the off state. If the flag is set in a different state, closure events of the switch cause the computer system to change back and forth between the normal operating state and the suspend state. The switch also controls the video subsystem of the computer system such that pressing the switch blanks the video display terminal giving the user instantaneous feedback of the switch press.
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公开(公告)号：ES2181701T3
公开(公告)日：2003-03-01
申请号：ES94304824
申请日：1994-06-30
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T
Abstract: A computer system having four states of power management: a normal operating state, a standby state, a suspend state, and an off state. The standby state is characterized by devices, such as a video controller and a hard drive, being placed into a low-power mode transparent to the operating system and the applications executing on the computer system. The suspend state is characterized by executing code being interrupted and the state of the computer system being saved to a file on the hard drive in such a manner that system power may be removed after the state of the computer system is saved to the hard drive. Later, after system power is restored, the state of the computer system is resumed by reading from the hard drive and loading it in such a manner that the operating system and application programs are not adversely affected. The normal operating state and the off state correspond to the typical on and off states of more conventional computer systems. The suspend/resume/standby feature is implemented at a low cost using many standard components.
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Patent Agency Ranking
公开(公告)号：AT223588T
公开(公告)日：2002-09-15
申请号：AT94304824
申请日：1994-06-30
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T
Abstract: A computer system having four states of power management: a normal operating state, a standby state, a suspend state, and an off state. The standby state is characterized by devices, such as a video controller and a hard drive, being placed into a low-power mode transparent to the operating system and the applications executing on the computer system. The suspend state is characterized by executing code being interrupted and the state of the computer system being saved to a file on the hard drive in such a manner that system power may be removed after the state of the computer system is saved to the hard drive. Later, after system power is restored, the state of the computer system is resumed by reading from the hard drive and loading it in such a manner that the operating system and application programs are not adversely affected. The normal operating state and the off state correspond to the typical on and off states of more conventional computer systems. The suspend/resume/standby feature is implemented at a low cost using many standard components.
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公开(公告)号：DE69428010D1
公开(公告)日：2001-09-27
申请号：DE69428010
申请日：1994-06-30
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T
Abstract: A method of saving and restoring the state of a CPU operating code in protected mode on a computer system. The save method makes use of BIOS operating in shadow RAM located in a region where linear addresses equal physical addresses while saving the state of the CPU. The registers that cannot be directly saved to memory are determined by searching the system memory for data structures that correspond to the particular register. The restore method uses dummy page tables that point to the shadowed BIOS to allow the CPU to reenter protected mode without generating a protection fault.
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公开(公告)号：CA2156537A1
公开(公告)日：1996-03-09
申请号：CA2156537
申请日：1995-08-18
Applicant: IBM
Inventor： CRUMP DWAYNE T , PANCOAST STEVEN T , BENSON PAUL H IV
Abstract: The present invention relates to a computer system having a CPU, a power management processor, an external signal reception means such as a modem, and a power supply in circuit communication. The power management processor controls the regulation of power to the CPU by the power supply. In preferred embodiments, responsive to a ring signal having a frequency in a predetermined range being detected by the power management processor, the power management processor causes the power supply to provide regulated power to the computer system. Thereafter, the CPU preferably confirms that a ring signal was present by querying the modem to determine whether the modem also detected a ring. If so, the system remains powered. If not, the CPU causes the power management controller to cause the power supply to cease providing regulated power.
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公开(公告)号：CA2156539A1
公开(公告)日：1996-03-08
申请号：CA2156539
申请日：1995-08-18
Applicant: IBM
Inventor： CRUMP DWAYNE T , PANCOAST STEVEN T , BENSON PAUL H IV
Abstract: The present invention relates to a computer system having a CPU, a power management processor, a switch, an external signal reception means such as a modem, a timer, and a power supply in circuit communication. Optionally the system may also include an override circuit and a glitch circuit. The power supply has several power supply states, which are controlled by the power management processor responsive to the CPU, the switch, the modem, the timer, the glitch circuit, the override circuit, and the power management processor itself.
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公开(公告)号：CA2120053A1
公开(公告)日：1995-01-24
申请号：CA2120053
申请日：1994-03-28
Applicant: IBM
Inventor： COMBS JAMES L , CRUMP DWAYNE T , PANCOAST STEVEN T
Abstract: A method of saving and restoring the state of a CPU operating code in protected mode on a computer system. The save method makes use of BIOS operating in shadow RAM located in a region where linear addresses equal physical addresses while saving the state of the CPU. The registers that cannot be directly saved to memory are determined by searching the system memory for data structures that correspond to the particular register. The restore method uses dummy page tables that point to the shadowed BIOS to allow the CPU to reenter protected mode without generating a protection fault.
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