公开(公告)号：GB2521314A

公开(公告)日：2015-06-17

申请号：GB201506273

申请日：2013-10-08

Applicant: IBM

Inventor： BYBELL ANTHONY J ,  DUKRO DAVID D ,  FREY BRADLY G ,  GSCHWIND MICHAEL KARL

IPC: G06F12/10

Abstract: An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to another format (810, 819, 840). Multiple translation structure formats (e.g., multiple page table formats, such as hash page tables and hierarchical page tables) are concurrently supported in a system configuration (702, 704). This facilitates provision of guest access in virtualized operating systems, and/or the mixing of translation formats to better match the data access patterns being translated.