公开(公告)号：GB2595097A

公开(公告)日：2021-11-17

申请号：GB202110762

申请日：2020-01-13

Applicant: IBM

Inventor： TAKASHI HISADA ,  TOYOHIRO AOKI ,  EIJI NAKAMURA

IPC: H01L23/00

Abstract: A technique of assembling a plurality of chips is disclosed. A plurality of chip layers, each of which includes at least one chip block, is prepared. Each chip block includes a plurality of electrodes assigned the same function. The plurality of the chip layers is sequentially stacked with rotation so as to configure at least one stack of overlapping chip blocks. Each stack holds a plurality of groups of vertically arranged electrodes with shifts in horizontal plane. A through hole is formed, for at least one of the groups, into the plurality of the chip layers at least in part so as to expose electrode surfaces of vertically arranged electrodes in the group. The through hole is filled with conductive material.

公开(公告)号：GB2599045A

公开(公告)日：2022-03-23

申请号：GB202117677

申请日：2020-05-04

Applicant: IBM

Inventor： TOYOHIRO AOKI ,  EIJI NAKAMURA ,  TAKASHI HISADA

IPC: H01L21/60

Abstract: An injection apparatus for injection material is disclosed. The injection apparatus includes a tank for storing material. The injection apparatus further includes a head body that has a surface for contacting a substrate and an opening part opened at the surface for discharging the material in fluid-communication with the tank. The injection apparatus further includes a member connected to the opening part, in which the member allows gas to flow into and flow out from the opening part.

公开(公告)号：GB2595097B

公开(公告)日：2022-11-02

申请号：GB202110762

申请日：2020-01-13

Applicant: IBM

Inventor： TAKASHI HISADA ,  TOYOHIRO AOKI ,  EIJI NAKAMURA

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/48

Abstract: A technique of assembling a plurality of chips is disclosed. A plurality of chip layers, each of which includes at least one chip block, is prepared. Each chip block includes a plurality of electrodes assigned the same function. The plurality of the chip layers is sequentially stacked with rotation so as to configure at least one stack of overlapping chip blocks. Each stack holds a plurality of groups of vertically arranged electrodes with shifts in horizontal plane. A through hole is formed, for at least one of the groups, into the plurality of the chip layers at least in part so as to expose electrode surfaces of vertically arranged electrodes in the group. The through hole is filled with conductive material.