公开(公告)号：CA1251868A

公开(公告)日：1989-03-28

申请号：CA508582

申请日：1986-05-07

Applicant: IBM

Inventor： EILERT JOHN H ,  FREY JEFFREY A ,  TAN YIH-SHIN ,  WARNES JAMES H

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50

Abstract: DYNAMIC ASSIGNMENT OF AFFINITY FOR VECTOR TASKS A method for dynamically assigning and removing task affinity for a resource is disclosed and claimed. A first interrupt handler recognizes a special task interrupt condition which is generated by the hardware. The interrupt condition is generated because a task attempted to execute a special instruction and either a special resource is attached to the central processing unit which issued the special instruction, or a special resource is not attached to the issuing central processing unit, but could be attached to another central processing unit in a central electronic complex. The first interrupt handler then passes control to a second interrupt handler which determines if execution of the current task can continue. If it can, the second interrupt handler creates or reestablishes a special environment and the task is dispatched (either for the first time or again) with a special dynamic affinity to only those central processing units in the central electronic complex that have a special resource attached. Due to the assignment of special affinity the task is dispatched only on a central processing unit with a special resource attached. The task can be suspended and special affinity removed because of non-use of the special resource over a predetermined period of time. Special affinity is automatically determined following a first-issued special instruction as well as one issued by a task whose special affinity was previously suspended.

公开(公告)号：DE3483070D1

公开(公告)日：1990-10-04

申请号：DE3483070

申请日：1984-06-20

Applicant: IBM

Inventor： EILERT JOHN H ,  LEVIN ARTHUR L ,  THOMAS JULIAN

IPC: G06F11/34

Abstract: A plurality of instrumentation table units (ITUs) is provided at various locations in a data processing system to collect sampled local signals, e.g. in each CPU, I/O processor, system controller, main storage controller, etc. While instrumentation is active, each ITU (30) samples internal system signals local to the ITU. Sampling of the system signals is done periodically at a low-rate relative to the CPU machine cycle rate, and the sampled signals are collected and stored in the ITUs for instrumentation analysis. Sampling pulses are synchronously distributed (55) to all ITUs in the system to synchronize corresponding addresses in every ITU storage array in the system. Their addresses are incremented in unison by each next sampling pulse to maintain address synchronism, after an initial reset on all ITUs in the system to start them all at the same address. Signal states captured in each currently addressed ITU entry are those existing at the time that a sampling pulse switches the address. The ITU collected hardware signals are related to software trace entries made in a trace table (TT) in main storage by each CPU in the system. Trace instruction execution and TT entry generation occurs asynchronously in relation to the sampling pulses and ITU signal collection. This asynchronous relationship between the ITU entries and the TT entries is bridged by providing an intervening table, called SAT, located in hidden storage, and address-synchronized with the ITUs correspondingly incrementing the SAT address with each sampling pulse. A SAT entry receives the time-of-day (TOD) value provided to the last entry made in an associated TT entry by the execution of a trace (TR) instruction. The TOD value provides a correlation code between the SAT entry and the TT entry. Also, a comment code provided in an operand of a TR instruction (which is put into a TT entry) may also be put into a related SAT entry. The contents of the ITUs, SATs and TTs are put on an I/O device for analysis.