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公开(公告)号:AU6967487A
公开(公告)日:1987-09-10
申请号:AU6967487
申请日:1987-03-04
Applicant: IBM
Inventor: CHELLIS LEROY NEWELL , ELLIS THERON LARUE
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公开(公告)号:DE2847070A1
公开(公告)日:1979-05-10
申请号:DE2847070
申请日:1978-10-28
Applicant: IBM
Inventor: BABCOCK THOMAS CHARLES , ELLIS THERON LARUE , MAJKA HENRY CASIMER
Abstract: Subsequent to the additive plating of copper circuitry on a substrate and prior to further steps such as lamination to form a multilayer printed circuit board, a sequence of etching and cleaning steps are used to improve the lamination strength of the additively plated copper. The circuitized substrate is dipped in an etchant bath and then baked at an elevated temperature for 2-4 hours. Following this the circuitized substrate is washed with an organic cleaner, water rinsed and air dried. Thereafter a chlorite oxide layer is added to the circuitized substrate and it is ready for further processing.
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公开(公告)号:DE3779934T2
公开(公告)日:1993-02-04
申请号:DE3779934
申请日:1987-02-20
Applicant: IBM
Inventor: CHELLIS LEROY NEWELL , ELLIS THERON LARUE
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公开(公告)号:AU593887B2
公开(公告)日:1990-02-22
申请号:AU6967487
申请日:1987-03-04
Applicant: IBM
Inventor: CHELLIS LEROY NEWELL , ELLIS THERON LARUE
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公开(公告)号:DE3278193D1
公开(公告)日:1988-04-07
申请号:DE3278193
申请日:1982-11-23
Applicant: IBM
Inventor: ELLIS THERON LARUE
Abstract: A laminate for a laminated multilayer circuit board incorporates as a constituent member the plating layer (11) from a peel-apart temporary base (12) used in the fabrication of the laminate. The layer (11), with its one surface (11a) superimposed on the base (12), has additively plated to its opposite surface (11b) individual conductors (14) and is subsequently personalized in register with the pattern of the plated conductor circuitry. The personalized layer (11) and the plated conductors (14) are embedded in a dielectric layer (15), the superimposed surface (11a) being flush mounted in the dielectric layer (15). The base (12) has a rough-like surface profile characteristic that imparts at least a conformal surface profile characteristic in the superimposed surface (11a) of the plating layer (11) which in turn provides improved adherence of this superimposed flush mounted surface, when subsequently exposed by the removal of the peel-apart base (12), to another dielectric layer (17) thereafter laminated to the embedding dielectric layer (15) to inhibit delamination between the two dielectric layers. Preferably, the base (12) also imparts a conformal profile surface characteristic either to the plating surface (11b) to improve the plating bond between the plating layer (11) and conductors (14), and / or to the laminating surface (15a) of the embedding dielectric layer (15) to improve the lamination bond between the two dielectric layers (15, 17), which combine with the conformal characteristic of the plating layer's (11) flush mounted surface (11a)to inhibit synergistically delamination between the two dielectric layers.
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公开(公告)号:BR8700761A
公开(公告)日:1987-12-29
申请号:BR8700761
申请日:1987-02-18
Applicant: IBM
Inventor: CHELLIS LEROY NEWELL , ELLIS THERON LARUE
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公开(公告)号:DE3779934D1
公开(公告)日:1992-07-30
申请号:DE3779934
申请日:1987-02-20
Applicant: IBM
Inventor: CHELLIS LEROY NEWELL , ELLIS THERON LARUE
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