公开(公告)号：GB2508761B

公开(公告)日：2014-11-19

申请号：GB201404456

申请日：2012-09-13

Applicant: IBM

Inventor： FAINSTEIN DANIEL ,  CESTERO ALBERTO ,  IYER SUBRAMANIAN S ,  KIRIHATA TOSHIAKI

IPC: G11C29/00 ,  G06F21/44 ,  G06F21/73

Abstract: A random intrinsic chip ID generation employs a retention fail signature. A 1st and 2nd ID are generated using testing settings with a 1st setting more restrictive than the 2nd, creating more fails in the 1st ID bit string that includes 2nd ID bit string. A retention pause time controls the number of retention fails, adjusted by a BIST engine, wherein the fail numbers satisfy a predetermined fail target. Verification confirms whether the 1st ID includes the 2nd ID bit string, the ID being the one used for authentication. Authentication is enabled by a 3rd ID with intermediate condition such that 1st ID includes 3rd ID bit string and 3rd ID includes 2nd ID bit string. The intermediate condition includes a guard-band to eliminate bit instability problem near the 1st and 2nd ID boundary. The intermediate condition is changed at each ID read operation, resulting in a more secure identification.

公开(公告)号：GB2508761A

公开(公告)日：2014-06-11

申请号：GB201404456

申请日：2012-09-13

Applicant: IBM

Inventor： FAINSTEIN DANIEL ,  CESTERO ALBERTO ,  IYER SUBRAMANIAN S ,  KIRIHATA TOSHIAKI

IPC: G11C29/00 ,  G06F21/44 ,  G06F21/73

Abstract: A random intrinsic chip ID generation employs a retention fail signature. A 1st and 2nd ID are generated using testing settings with a 1st setting more restrictive than the 2nd, creating more fails in the 1st ID bit string 275 that includes 2nd ID bit string 290. A retention pause time controls the number of retention fails, adjusted by a BIST engine 625, wherein the fail numbers 803, 920 satisfy a predetermined fail target. Verification confirms whether the 1st ID includes the 2nd ID bit string, the ID being the one used for authentication. Authentication is enabled by a 3rd ID with intermediate condition such that 1st ID includes 3rd ID bit string and 3rd ID includes 2nd ID bit string. The intermediate condition includes a guard-band to eliminate bit instability problem near the 1st and 2nd ID boundary. The intermediate condition is changed at each ID read operation, resulting in a more secure identification.