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公开(公告)号：DE2962433D1
公开(公告)日：1982-05-19
申请号：DE2962433
申请日：1979-06-01
Applicant: IBM
Inventor： FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
IPC: G06F9/22 , G06F9/30 , G06F9/305 , G06F9/318 , G06F9/34 , G06F9/355 , G06F12/06 , G06F13/00 , G06F9/06
Abstract: A programmable control latch mechanism which is particularly useful in a microprocessor. One or more control latches are provided which can be set or reset under direct program control directly from the instruction register of a data processor by the loading therein of a unique program instruction. The unique instruction includes for each control latch two predetermined bit positions, one of which determines whether or not the control latch is to be changed and the other of which determines the binary value to which the control latch is to be changed. This enables anywhere from one to all of the control latches to be changed by a single instruction and enables each latch which is changed to be changed to any desired binary value. The control latch outputs can be used for storage page selection, direct control of external devices or circuits, selection of internal processor functions and the like.
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公开(公告)号：IT1148827B
公开(公告)日：1986-12-03
申请号：IT2199280
申请日：1980-05-13
Applicant: IBM
Inventor： BLISS FLOYD RUSSELL , FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
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公开(公告)号：DE3069401D1
公开(公告)日：1984-11-15
申请号：DE3069401
申请日：1980-04-25
Applicant: IBM
Inventor： BLISS FLOYD , FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
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Patent Agency Ranking
公开(公告)号：IT1209221B
公开(公告)日：1989-07-16
申请号：IT2199380
申请日：1980-05-13
Applicant: IBM
Inventor： FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
Abstract: A storage address link register system for enabling nested program branching wherein a first subroutine may call a second subroutine which is executed before the first subroutine returns program control back to the program which called it. The system includes a mechanism whereby the same set of storage address link registers may be used for nested branching both during the execution of a normal program and during the execution of an interrupt service program which breaks into the normal program and takes over control of the processor for a short interval of time. A mechanism is provided for saving the normal program values in the link registers at the commencement of the interrupt service program. A further mechanism is provided for monitoring the usage of the link registers by the interrupt program for enabling the normal program values to be restored in the link registers only after all interrupt program values have been removed from such link registers.
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公开(公告)号：AU525348B2
公开(公告)日：1982-11-04
申请号：AU4679379
申请日：1979-05-08
Applicant: IBM
Inventor： FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
Abstract: A programmable control latch mechanism which is particularly useful in a microprocessor. One or more control latches are provided which can be set or reset under direct program control directly from the instruction register of a data processor by the loading therein of a unique program instruction. The unique instruction includes for each control latch two predetermined bit positions, one of which determines whether or not the control latch is to be changed and the other of which determines the binary value to which the control latch is to be changed. This enables anywhere from one to all of the control latches to be changed by a single instruction and enables each latch which is changed to be changed to any desired binary value. The control latch outputs can be used for storage page selection, direct control of external devices or circuits, selection of internal processor functions and the like.
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公开(公告)号：IT8021993D0
公开(公告)日：1980-05-13
申请号：IT2199380
申请日：1980-05-13
Applicant: IBM
Inventor： FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
Abstract: A storage address link register system for enabling nested program branching wherein a first subroutine may call a second subroutine which is executed before the first subroutine returns program control back to the program which called it. The system includes a mechanism whereby the same set of storage address link registers may be used for nested branching both during the execution of a normal program and during the execution of an interrupt service program which breaks into the normal program and takes over control of the processor for a short interval of time. A mechanism is provided for saving the normal program values in the link registers at the commencement of the interrupt service program. A further mechanism is provided for monitoring the usage of the link registers by the interrupt program for enabling the normal program values to be restored in the link registers only after all interrupt program values have been removed from such link registers.
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公开(公告)号：IT8021992D0
公开(公告)日：1980-05-13
申请号：IT2199280
申请日：1980-05-13
Applicant: IBM
Inventor： BLISS FLOYD RUSSELL , FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
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公开(公告)号：AU4679379A
公开(公告)日：1980-01-03
申请号：AU4679379
申请日：1979-05-08
Applicant: IBM
Inventor： FAIRCHILD PETER TAPPEN , LEININGER JOEL CALVIN
Abstract: A programmable control latch mechanism which is particularly useful in a microprocessor. One or more control latches are provided which can be set or reset under direct program control directly from the instruction register of a data processor by the loading therein of a unique program instruction. The unique instruction includes for each control latch two predetermined bit positions, one of which determines whether or not the control latch is to be changed and the other of which determines the binary value to which the control latch is to be changed. This enables anywhere from one to all of the control latches to be changed by a single instruction and enables each latch which is changed to be changed to any desired binary value. The control latch outputs can be used for storage page selection, direct control of external devices or circuits, selection of internal processor functions and the like.
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