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    DATA TRANSMISSION SYSTEM
    2.
    发明专利
    DATA TRANSMISSION SYSTEM 未知

    公开(公告)号：GB1221964A

    公开(公告)日：1971-02-10

    申请号：GB1623368

    申请日：1968-04-04

    Applicant: IBM

    Inventor： CROISIER ALAIN ,  FALCOZ ALAIN

    IPC: G06F13/42 ,  H04L12/40

    Abstract: 1,221,964. Digital transmission systems. INTERNATIONAL BUSINESS MACHINES CORP. 4 April, 1968 [18 April, 1967], No. 16233/68. Heading H4P. [Also in Division G4] A data transmission system (Fig. 1) comprises transmission and reception units 1, 2 which may be components of a data processing unit or of magnetic tape stores, printers, displays or punches. These are unidirectionally coupled at 14 to a channel comprising a data line 7, a clock line 8, and a transmission demand line 9. Line 7 may be plural to transmit a byte of data in parallel. Units 1, 2 have associated control units 5, 6 connected over lines 10, 11, 39 and 12, 13, 40 driving transmitters 31, 32; 33, 34 and receiving the outputs of receivers 41, 42; 44, 45, and are directly coupled to line 7 over receivers 43, 46. Thus unit 1 is coupled to line 7 over transmitter 31 and receiver 43; to line 8 over receiver 42, and to line 9 over transmitter 32 and receiver 41. Control unit 5 (Fig. 2), to which control unit 6 is similar, comprises a transmission demand trigger 22 and a data trigger 48 receiving "1" inputs over lines 11, 10 from unit 1. The "1" output 27 of trigger 22 when energized in response to the "1" input is connected to AND units 16, 23; the former also receiving operating signals from receiver 42 coupled to clock line 8, from inverter 18 driven from receiver 41 coupled to demand line 9, and from delay 20 coupled to the output of AND unit 23, which receives signals from trigger 22, and over delay 24 from receiver 42; to energize transmitter 32 coupled to demand line 9. Trigger 48 energizes AND unit 28 together with signals from the output of AND unit 16, and this output also energizes the "O" inputs of triggers 22, 48 over delay 35, while the AND unit 28 operates transmitter 31 coupled to data line 7. In operation, for unit 1 to transmit a binary digit, trigger 48 is set to "1" state to energize AND unit 28 and trigger 22 is also set to "1" to operate trigger 22 and energize AND gate 16. The next succeeding clock pulse over receiver 42 energizes AND unit 16 and also AND unit 23 after delay in 24, so as to energize transmitter 32 which imposes a transmission demand signal on line 9, and energizes the AND unit 16 after delay in 20. Inverter 18 driven from receiver 41 coupled to the transmission demand signal on line 9 energizes AND unit 16, in the absence of a transmission demand signal on line 9 and presence of a clock pulse on line 8, to actuate AND circuit 28 and transmitter 31 to transmit the "1" bit stored at 48 into line 7. After delay at 35, trigger circuits 22, 48 are reset with unit 1; indicating that data has been transmitted. If the AND unit 16 is inactivated for want of one or more inputs, triggers 22, 48 are not operated and the data signal is held stored in unit 5 until a clock pulse occurs in line 8 without a demand signal on line 9. As shown, units 1, 2 are coupled to the transmission channel so that signals are transmitted to the right and received from the left, and a transmission demand signal disables all other units from transmissions. Each TR unit may have dual control units 5 for rightward and leftward transmission; lines 7, 9 being doubled to avoid interference.

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