公开(公告)号：US3226534A

公开(公告)日：1965-12-28

申请号：US15763661

申请日：1961-12-07

Applicant: IBM

Inventor： FITZGERALD WILLIAM J

IPC: G06F7/38 ,  G11C11/44 ,  H03K23/00

CPC classification number: H03K23/001 ,  G06F7/381 ,  G11C11/44

公开(公告)号：FR2325110A1

公开(公告)日：1977-04-15

申请号：FR7623638

申请日：1976-07-27

Applicant: IBM

Inventor： FITZGERALD WILLIAM J ,  SHELTON GLENMORE L JR ,  WOLFE ROBERT N

IPC: G06T11/20 ,  G06F15/20 ,  G06K15/20

公开(公告)号：DE1185403B

公开(公告)日：1965-01-14

申请号：DEJ0022782

申请日：1962-12-06

Applicant: IBM

Inventor： FITZGERALD WILLIAM J

IPC: G06F7/38 ,  G11C11/44 ,  H03K23/00

Abstract: 1,006,684. Superconductor circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 4, 1962 [Dec. 7, 1961], No. 45738/62. Heading H3B. A superconducting path L comprising a series of cryotron gates 2, 4, 6 &c. controlled by conductors 28, 30, 32 &c. is combined with equipment for timing the fall of current in path L to a predetermined level. Constant current from a source IS is initially directed wholly to path L by a pulse applied to the control winding 14 of cryotron gate 12. When one or more of the gate conductors 2, 4, 6 &c. are driven resistive, the current is diverted to a parallel path R and the time taken by the diversion depends upon the number of resistive gates. The path R feeds in parallel a number of flipflop indicators 22, 24, 26 &c. through AND gates 16, 18, 20 &c. respectively. The AND gates are marked by timing pulses t1, t2, t3 &c. The first AND gate to operate is followed by a flip-flop to indicate when the critical operating current of the AND gates was reached. The gates 2, 4, 6 &c. may each have two or more control conductors to enable the signals on different sets of control conductors to be compared.

公开(公告)号：CA727317A

公开(公告)日：1966-02-01

申请号：CA727317D

Applicant: IBM

Inventor： FITZGERALD WILLIAM J