公开(公告)号：DE1956460A1

公开(公告)日：1970-09-03

申请号：DE1956460

申请日：1969-11-10

Applicant: IBM

Inventor： JAMES LLEWELYN ROGER ,  FRANCIS MINSCHULL JOHN

IPC: G06F9/26 ,  G06F9/22 ,  G06F9/32 ,  G06F9/34 ,  G06F9/38 ,  G06F12/08 ,  G11C15/04 ,  G06F7/00

Abstract: 1,234,484. Data processing. INTERNATIONAL BUSINESS MACHINES CORP. 12 Nov., 1968, No. 53517/68. Heading G4A. An electronic data processing system comprises a control store controlling (a) execution of functions by table-look-up procedures in an associative working store and (b) execution by table-look-up procedures in an associative address store of functions on address data to be used in addressing a non-associative data store in the system, the arrangement being such that simultaneous execution can take place in the working and address stores. The control store, which is associative, supplies tags for interrogating the associative working and address stores and an associative local store (which comprises registers). A 4-byte ADD instruction is read, two bytes at a time, from the data store addressed from an instruction counter in the address store, the op code being interpreted in the working store to select the microprogramme used to access the operands. The instruction specifies the register holding the first operand, and a displacement and two further registers, the displacement and contents of the two further registers being added serially by byte using table-look-up in the working store to obtain the address in the data store of the second operand. This address, supplied serially by byte as formed, is inserted into the right-most byte position of the input-output register of the address store and shifted along utilizing tablelook-up in a shift table in the address store, until the whole address is present when it is used for addressing the data store. Shift.-Each word in the shift table has a single 1, every other bit being a " don't care," and successive words have the 1 in positions 1, 1; 2, 1; 3, 1; 4, 1; 1, 2; 2,2; 3, 2; 4,2; 1, 3 &c., where the first digit is the byte position and the second is the bit position, numbered from the right. As each byte arrives in the input-output register, the register is used to interrogate all the words in the shift table and the word immediately following each word giving a match is read out, these words being read out simultaneously, corresponding bits being ORed, the result going into the input-output register. Invalid address check.-The associative address store may have a table for detecting any 1 bit in the highest order byte or lowest order bit of an address, each word in the table having a single 1 bit in a different position for interrogating, the other bits interrogated being " don't cares," a match causing read out of an error 1 bit. Alternatively, such error 1 bits may be included in the shift table for the same purpose. Specifications Nos. 1,127,270, 1,186,703, 1,218,406 are referred to, the first two for suitable associative stores and the last as being a system of which the present invention is a modification.