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公开(公告)号:US3170071A
公开(公告)日:1965-02-16
申请号:US1860160
申请日:1960-03-30
Applicant: IBM
Inventor: GRIESMER JAMES H , PAUL ROTH JOHN , WAGNER ERIC G
CPC classification number: G06F11/20 , G11C11/44 , Y10S505/858
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2.Serially connected inhibitor logic stages with means for bypassing a selected stage 失效
Title translation: 串联的抑制器逻辑级具有用于绕过选定级的装置公开(公告)号:US3235842A
公开(公告)日:1966-02-15
申请号:US4626360
申请日:1960-07-29
Applicant: IBM
Inventor: PAUL ROTH JOHN , GRIESMER JAMES H , MILLER RAYMOND E , SELFRIDGE JOHN L , WAGNER ERIC G
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公开(公告)号:US3079083A
公开(公告)日:1963-02-26
申请号:US330260
申请日:1960-01-19
Applicant: IBM
Inventor: GRIESMER JAMES H , WAGNER ERIC G
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公开(公告)号:CA757768A
公开(公告)日:1967-04-25
申请号:CA757768D
Applicant: IBM
Inventor: GRIESMER JAMES H , WAGNER ERIC G , ROTH JOHN P
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公开(公告)号:CA697507A
公开(公告)日:1964-11-10
申请号:CA697507D
Applicant: IBM
Inventor: GRIESMER JAMES H , WAGNER ERIC G
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公开(公告)号:CA728829A
公开(公告)日:1966-02-22
申请号:CA728829D
Applicant: IBM
Inventor: ROTH JOHN P , MILLER RAYMOND E , WAGNER ERIC G , GRIESMER JAMES H , SELFRIDGE JOHN L
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