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公开(公告)号：US3531778A
公开(公告)日：1970-09-29
申请号：US3531778D
申请日：1968-01-03
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H
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公开(公告)号：US3593304A
公开(公告)日：1971-07-13
申请号：US3593304D
申请日：1968-07-01
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H
IPC: G06F7/50 , G06F7/505 , G11C11/411 , G11C11/414 , G11C11/416 , G11C19/28 , G06F7/06
CPC classification number: G06F7/505 , G06F2207/4822 , G11C11/4116 , G11C11/414 , G11C11/416 , G11C19/28
Abstract: This disclosure teaches a memory that performs logical operations by combining two or more words of data in a single storage location or on a storage signal carrying wire such that the data signals combine in ways that have logical significance. Threshold logic circuits are connected with the memory signal wires to propagate carries for addition or subtraction.
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公开(公告)号：US3509380A
公开(公告)日：1970-04-28
申请号：US3509380D
申请日：1966-10-26
Applicant: IBM
Inventor： GILLETT JOHN B , HALLETT MICHAEL H
CPC classification number: H03K3/012
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公开(公告)号：US3609702A
公开(公告)日：1971-09-28
申请号：US3609702D
申请日：1968-10-23
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H , TITMAN PETER J
CPC classification number: G11C15/04
Abstract: This invention relates to an associative memory for the storage of digital data in which each word location of the memory is provided with two or more match triggers. Mans is provided for registering matches or mismatches in a selected trigger and for controlling operations on the memory in response to the contents of a selected trigger. Several operations are described which use the plural triggers.
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公开(公告)号：US3543296A
公开(公告)日：1970-11-24
申请号：US3543296D
申请日：1968-06-28
Applicant: IBM
Inventor： GARDNER PETER A F , HALLETT MICHAEL H , TITMAN PETER J
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Patent Agency Ranking
公开(公告)号：US3585605A
公开(公告)日：1971-06-15
申请号：US3585605D
申请日：1969-05-28
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H , LLEWELYN ROGER J , TITMAN PETER J
Abstract: Three associative stores are interconnected to provide a data processor. A control store contains a microprogram and it emits tags that select a function table in a working store and data from a local store, the data being applied to the working store as a look-up argument. The local store may also hold a macroprogram. Two of the stores are interconnected so that a tag emitted by one is used to address the other and vice versa. A nonassociative main store may be connected to the local store.
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公开(公告)号：US3566367A
公开(公告)日：1971-02-23
申请号：US3566367D
申请日：1969-02-20
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H , TITMAN PETER J
CPC classification number: G11C15/04 , G01R19/0038
Abstract: THIS INVENTION PROVIDES AN ASSOCIATIVE MEMORY (OR OTHER ORDERED ARRAY OF ELECTRONIC CIRCUITS) WITH MEANS FOR STEPPING FROM WORD TO WORD THROUGH THE ARRAY FOR CERTAIN OPERATIONS AND A NOVEL CIRCUIT FOR BYPASSING DEFECTIVE WORDS. AN ARRAY WITH DEFECTIVE COMPONENTS REMAINS OPERABLE AT A REDUCED CAPACITY.
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公开(公告)号：US3504351A
公开(公告)日：1970-03-31
申请号：US3504351D
申请日：1968-01-02
Applicant: IBM
Inventor： GARDNER PETER A E , HALLETT MICHAEL H
IPC: G11C8/16 , G11C11/411 , G11C5/06 , H03K23/08
CPC classification number: G11C11/411 , G11C8/16
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公开(公告)号：CA876952A
公开(公告)日：1971-07-27
申请号：CA876952D
Applicant: IBM
Inventor： GARDNER PETER A E , TITMAN PETER J , LLEWELYN ROGER J , HALLETT MICHAEL H
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公开(公告)号：FR2337380A1
公开(公告)日：1977-07-29
申请号：FR7635303
申请日：1976-11-19
Applicant: IBM
Inventor： BARCLAY DONALD J , HALLETT MICHAEL H
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