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公开(公告)号:GB2535940A
公开(公告)日:2016-08-31
申请号:GB201610563
申请日:2014-12-08
Applicant: IBM
Inventor: HEIKE E RIEL , VOLKER SCHMIDT
Abstract: A thermoelectric device (1) for transferring heat from a heat source (2) to a heat sink (3) comprises a first thermoelectric leg pair (10) having a first leg (4) including an n-type semiconductor material and a second leg (5) including a p-type semiconductor material, wherein the first leg (4) and the second leg (5) are electrically coupled in series. A second thermoelectric leg pair (11) has a third leg (7) including an n-type semiconductor material and a fourth leg (8) including a p-type semiconductor material, wherein the third leg (7) and the fourth leg (8) are electrically coupled in series. A first contact (12) placed between the first leg (4) and the fourth leg (8); and a second contact (13) placed between the second leg (5) and the third leg (7). A method for manufacturing a thermoelectric device or module comprises the steps of: providing a first thermoelectric leg pair (10) having a first leg (4) including an n-type semiconductor material and a second leg (5) including a p-type semiconductor material; electrically coupling the first leg (4) and the second leg (5) of the first thermoelectric leg pair (10) in series; providing a second thermoelectric leg pair (11) having a third leg (7) including an n-type semiconductor material and a fourth leg (8) including a p-type semiconductor material; electrically coupling the third leg (7) and the fourth leg (8) of the second thermoelectric leg pair (11) in series; placing a first contact (12) between the first leg (4) and the fourth leg (8); and placing a second contact (13) between the second leg (5) and the third leg (7).
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公开(公告)号:GB2535418A
公开(公告)日:2016-08-17
申请号:GB201610764
申请日:2014-12-08
Applicant: IBM
Inventor: MATTIAS BENGT BORG , KIRSTEN EMILIE MOSELUND , HEIKE E RIEL , HEINZ SCHMID
IPC: H01L21/02
Abstract: Methods are provided for fabricating semiconductor nanowires 12, 40, 41, 45, 57 on a substrate 1, 20, 50. A nanowire template 3, 6; 22, 24; 31, 32 is formed on the substrate. The nanowire template defines an elongate tunnel 8, 26, 33 which extends, laterally over the substrate, between an opening 7, 25 in the template and a seed surface 10, 27, 34. The seed surface 10, 27, 34 is exposed to the tunnel and of area up to about 2x 4 10 nm 2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface 10, 27, 34 is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface.
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公开(公告)号:GB2532746B
公开(公告)日:2017-03-29
申请号:GB201420993
申请日:2014-11-26
Applicant: IBM
Inventor: BERND W GOTSMANN , FABIAN MENGES , HEIKE E RIEL
IPC: G01Q60/58
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公开(公告)号:GB2532746A
公开(公告)日:2016-06-01
申请号:GB201420993
申请日:2014-11-26
Applicant: IBM
Inventor: BERND W GOTSMANN , FABIAN MENGES , HEIKE E RIEL
IPC: G01Q60/58
Abstract: SThM apparatus includes a heated sensor 5, heated support 4 and analyser 11. The analyzer signal extractor 15 includes a low pass filter (23) to extract a DC signal component representing time averaged values and a lock-in amplifier (24) to extract an AC signal component representing time dependent values. A sample temperature controller 12 causes a periodic sinusoidal modulation in sample temperature, generating a heat flux between sample and sensor on contact. The signal components are processed to determine their amplitude/ magnitude ratio, used to indicate sample temperature for each measurement position. Different aspects include control of power to maintain temperature by feedback and analysis of two AC components representing Joule and Peltier heating and cooling.
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公开(公告)号:GB2535418B
公开(公告)日:2018-10-24
申请号:GB201610764
申请日:2014-12-08
Applicant: IBM
Inventor: MATTIAS BENGT BORG , KIRSTEN EMILIE MOSELUND , HEIKE E RIEL , HEINZ SCHMID
IPC: H01L21/02
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公开(公告)号:GB2535940B
公开(公告)日:2018-06-27
申请号:GB201610563
申请日:2014-12-08
Applicant: IBM
Inventor: HEIKE E RIEL , VOLKER SCHMIDT
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公开(公告)号:GB2532786A
公开(公告)日:2016-06-01
申请号:GB201421182
申请日:2014-11-28
Applicant: IBM
Inventor: MATTIAS BENGT BORG , KIRSTEN EMILIE MOSELUND , HEIKE E RIEL , HEINZ SCHMID
IPC: H01L21/02
Abstract: A method for manufacturing a semiconductor structure 1 comprises: providing a substrate 2 including a first semiconductor material; forming a dielectric layer 3 on a surface of the substrate 2; forming an opening in the dielectric layer 3 having a bottom reaching the substrate 2; providing a second semiconductor material 7B in the opening and on the substrate 2, the second semiconductor material 7B being encapsulated by a further dielectric material 6 forming a filled cavity; melting the second semiconductor material 7B in the cavity; recrystallizing the second semiconductor material 7B in the cavity; laterally removing the second semiconductor material 7B at least partially for forming a lateral surface at the second semiconductor material 7B; and forming a third semiconductor material 11 on the lateral surface of the second semiconductor material 7B. Also disclosed is the semiconductor structure 1 produced by the above method. The invention seeks to form compound semiconductor layers on silicon substrates without lattice mismatch deformations.
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