公开(公告)号：EP1749117A4

公开(公告)日：2008-09-10

申请号：EP05733912

申请日：2005-04-07

Applicant: IBM

Inventor： DUPUIS MARK D ,  HODGE WADE J ,  KELLY DANIEL T ,  WUTHRICH RYAN W

IPC: C23C16/24 ,  H01L21/20 ,  H01L21/205 ,  H01L21/36 ,  H01L29/04 ,  H01L29/10 ,  H01L29/12 ,  H01L31/036

CPC classification number: H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639

Abstract: A method for determining a SiGe deposition condition so as to improve yield of a semiconductor structure. Fabrication of the semiconductor structure starts with a single-crystal silicon (Si) layer. Then, first and second shallow trench isolation (STI) regions are formed in the single-crystal Si layer. The STI regions sandwich and define a first single-crystal Si region. Next, silicon-germanium (SiGe) mixture is deposited on top of the structure in a SiGe deposition condition so as to grow (i) a second single-crystal silicon region grows up from the top surface of the first single­ crystal silicon region and (ii) first and second polysilicon regions from the top surfaces of the first and second STI regions, respectively. By increasing SiGe deposition temperature and/or lowering precursor flow rate until the resulting yield is within a pre-specified range, a satisfactory SiGe deposition condition can be determined for mass production of the structure.

公开(公告)号：WO2005117125A2

公开(公告)日：2005-12-08

申请号：PCT/US2005011677

申请日：2005-04-07

Applicant: IBM ,  DUPUIS MARK D ,  HODGE WADE J ,  KELLY DANIEL T ,  WUTHRICH RYAN W

Inventor： DUPUIS MARK D ,  HODGE WADE J ,  KELLY DANIEL T ,  WUTHRICH RYAN W

IPC: H01L21/20 ,  H01L21/205 ,  H01L29/04 ,  H01L29/10 ,  H01L29/12 ,  H01L31/036

CPC classification number: H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639

Abstract: A method for determining a SiGe deposition condition so as to improve yield of a semiconductor structure. Fabrication of the semiconductor structure starts with a single-crystal silicon (Si) layer. Then, first and second shallow trench isolation (STI) regions are formed in the single-crystal Si layer. The STI regions sandwich and define a first single-crystal Si region. Next, silicon-germanium (SiGe) mixture is deposited on top of the structure in a SiGe deposition condition so as to grow (i) a second single-crystal silicon region grows up from the top surface of the first single­ crystal silicon region and (ii) first and second polysilicon regions from the top surfaces of the first and second STI regions, respectively. By increasing SiGe deposition temperature and/or lowering precursor flow rate until the resulting yield is within a pre-specified range, a satisfactory SiGe deposition condition can be determined for mass production of the structure.

Abstract translation: 一种用于确定SiGe沉积条件以提高半导体结构的产量的方法。 半导体结构的制造以单晶硅（Si）层开始。 然后，在单晶Si层中形成第一和第二浅沟槽隔离（STI）区域。 STI区域夹着并限定了第一单晶Si区域。 接下来，硅锗（SiGe）混合物以SiGe沉积条件沉积在结构的顶部上，以便生长（i）第二单晶硅区域从第一单晶硅区域的顶表面生长并且（ ii）分别从第一和第二STI区域的顶表面的第一和第二多晶硅区域。 通过提高SiGe沉积温度和/或降低前驱体流速直到得到的产率达到预定范围内，可以确定满足SiGe沉积条件以进行大规模生产。