公开(公告)号：DE69604294T2

公开(公告)日：2000-04-27

申请号：DE69604294

申请日：1996-05-03

Applicant: IBM ,  IBM DEUTSCHLAND INFORMATIONSSY

Inventor： COHEN ARIEL ,  HOLLAND WILLIAM ,  LOGAN JOSEPH ,  PARASH AVI

IPC: G06F13/36 ,  G06F13/14 ,  G06F15/177 ,  G06F15/16

Abstract: An adapter or add-in card for using in a peripheral component interconnect (PCI) computer includes a universal module which couples the card to the PCI bus. The module includes a set of selectively programmable configuration registers which are loaded by a microprocessor on the adapter. A circuit arrangement on the module issues a command which inhibits the PCI processor from accessing the configuration registers until fully loaded.

公开(公告)号：DE69604294D1

公开(公告)日：1999-10-21

申请号：DE69604294

申请日：1996-05-03

Applicant: IBM ,  IBM DEUTSCHLAND INFORMATIONSSY

Inventor： COHEN ARIEL ,  HOLLAND WILLIAM ,  LOGAN JOSEPH ,  PARASH AVI

IPC: G06F13/36 ,  G06F13/14 ,  G06F15/177 ,  G06F15/16

Abstract: An adapter or add-in card for using in a peripheral component interconnect (PCI) computer includes a universal module which couples the card to the PCI bus. The module includes a set of selectively programmable configuration registers which are loaded by a microprocessor on the adapter. A circuit arrangement on the module issues a command which inhibits the PCI processor from accessing the configuration registers until fully loaded.

公开(公告)号：DE69602091D1

公开(公告)日：1999-05-20

申请号：DE69602091

申请日：1996-05-03

Applicant: IBM DEUTSCHLAND INFORMATIONSSY

Inventor： COHEN ARIEL ,  HOLLAND WILLIAM ,  LOGAN JOSEPH ,  PARASH AVI

IPC: G06F13/36 ,  G06F12/06 ,  G06F13/14

Abstract: An adapter or add-in card for use in a peripheral component interconnect (PCI) computer includes a universal module which couples the card to the PCI bus. The module includes a set of selectively programmable configuration registers which are loaded by a microprocessor on the adapter. A circuit arrangement on the module issues a command which inhibits the PCI processor from accessing the configuration registers until fully loaded. Another circuit arrangement presents the Expansion ROM base address register as a 'read/write' register or a read only register with all bits set to logical "0 " to the PCI computer. If the Expansion ROM base address register is presented as a read only register with all bits set to "0 ", the PCI computer concludes that no Expansion ROM exists on the add-in card, and its contents are not shadowed into the memory of the PCI computer. This disabling of the Expansion ROM causes memory space to be conserved in the computer. If the Expansion ROM is presented as a read/write register with non-zero values, the PCI computer concludes that an Expansion ROM exists and "shadows" its contents into the memory of the PCI computer.

公开(公告)号：AT505015T

公开(公告)日：2011-04-15

申请号：AT06819932

申请日：2006-12-08

Applicant: IBM

Inventor： ARROYO JESSE ,  BOLAN JOSEPH ,  BREY THOMAS ,  CORS JOSEP ,  DAKE GREGORY ,  DUNHAM SCOTT ,  HOLLAND WILLIAM ,  VOJNOVICH THEODORE BRIAN ,  NELSON SCOTT

IPC: H04L29/06

Abstract: An apparatus, system, and method are disclosed for deploying sensitive communication parameters to a diskless computing device. A parameter structure module is included to store one or more Internet Small Computer System Interface (“iSCSI”) communication parameters in an extendable data structure configured to store a set of basic parameter settings and a set of extended parameter settings. A link module is included to establish a secure link to a diskless computing device over a physically secure connection. A deployment module is included to deploy the extendable data structure over the secure connection to a non-volatile memory in the diskless computing device. The non-volatile memory is configured to provide sensitive iSCSI communication parameters provided by the extendable data structure to a CPU of the diskless computing device during a boot sequence.