公开(公告)号：DE2727751A1

公开(公告)日：1978-01-05

申请号：DE2727751

申请日：1977-06-21

Applicant: IBM

Inventor： HUNG ROLAND YEN-MOU ,  LEVINE JAMES LEWIS

IPC: G02F1/01 ,  G09F9/30 ,  G09F9/37 ,  H01L31/14 ,  G02F1/00

Abstract: A deformographic membrane display system in which a semiconductor substrate, for example silicon, has an insulating layer such as SiO2 formed thereon with an array of holes formed in the insulating layer. Alternatively, the insulating layer may be omitted, with the holes being formed in the substrate. A reflective membrane, including a thin metal layer, is formed over the surface in which the holes are formed. Electrodes are formed in the silicon substrate directly beneath or in each of the holes. Control circuitry, which for example, may be formed utilizing metal oxide semiconductor field effect transistor (MOSFET) technology and/or bipolar technology, is formed in the silicon substrate for selectively energizing the electrodes. The portion of the membrane over a given hole is deformed in response to the electrode thereunder being energized by the control circuitry.

公开(公告)号：DE2860581D1

公开(公告)日：1981-04-23

申请号：DE2860581

申请日：1978-08-25

Applicant: IBM

Inventor： HUNG ROLAND YEN-MOU ,  SHIH KWANG KUO

IPC: H01L27/15 ,  H01L33/00

Abstract: Monolithic light emitting diode arrays may be fabricated by using a two layer binary semiconductor substrate wafer providing a gradient of ingredient concentration in one portion of the wafer and forming p-n junctions to a desired depth in the graded concentrated wafer and selectively removing portions of the opposite sides of the wafer adjacent to said p-n junctions in order to permit light of varying colors to escape and to provide optical isolation. Metallurgical pads are provided to each of the p-n junctions for solder reflow type connections.

公开(公告)号：DE2628406A1

公开(公告)日：1977-02-03

申请号：DE2628406

申请日：1976-06-24

Applicant: IBM

Inventor： HUNG ROLAND YEN-MOU

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/316 ,  H01L21/331 ,  H01L21/60 ,  H01L29/20 ,  H01L29/73 ,  H01L21/18

Abstract: A method for fabricating an indium antimonide semiconductor device which includes anodizing through a portion of the thickness of an indium antimonide substrate containing an active impurity of a first type; selectively ion implanting an active impurity of a second type into the indium antimonide substrate; annealing; providing for ohmic electrical contact between preselected regions of the indium antimonide substrate and subsequently applied electrical contacts; and depositing a plurality of electrical contacts, a predetermined number of which are in ohmic electrical contact with the preselected regions of the substrate to thereby provide the semiconductor device; and semiconductor device obtained thereby.