公开(公告)号：DE1194453B

公开(公告)日：1965-06-10

申请号：DEJ0023361

申请日：1963-03-15

Applicant: IBM

Inventor： JUN ARTHUR JULIUS SCRIVER

IPC: G06F9/48

Abstract: 957, 834. Electric digital calculators. INTERNATIONAL BUSINESS MACHINES CORPORATION. March 15,1963 [March 20, 1962], No. 10377/63. Heading G4A. A control unit for a digital computer, comprises a rectangular array of bi-stable devices and scanning means which in response to a change of state of one of the devices, scans the columns for one including the changed device and then scans this column for the device. The unit may be a priority mechanism for computer interrupt each bi-stable device being a calling trigger for its associated peripheral unit. As described each trigger e.g. T57 forms one input of an associated AND gate 160. Energization of one of ten "column-select" OR gates 118-0 to 118-9 enables the second input of every AND gate 160 of the corresponding column, while energization of one of ten "row-select" OR gates 117-0 to 117-9 enables the third input of every AND gate 160 in the corresponding row. In operation a program unit 111 applies a test signal to energize all the "row-select" and "column-select" OR gates and if any of the triggers are calling i.e. if any of the peripheral units require service, the corresponding AND gates 160 are enabled. The outputs of the AND gates are combined in an OR circuit 102 which switches on a start trigger 104 to block further test signals, and also trips a trigger 106 to start a transistor ring B107. The trigger 106 applies an enabling signal to each of the "rowselect" OR gates 117 and the ring B107 enables in turn each of the "column-select" OR gates 118. When an OR gate 118 associated with a column including a calling trigger is enabled, a second pulse is produced by the OR circuit 102 and this enables an AND gate 108, switching off trigger 106 and thus holding ring B107 maintaining the selected column OR gate 118 enabled. The enabled AND gate 108 also switches a trigger T112 to start a second ring A113 which energizes each of the "row-select" OR gates, thus scanning the column selected by the ring B107. A third pulse is thus produced by the OR circuit 102 when the calling trigger is enabled and rings A, B, remain on the corresponding positions to indicate the called trigger.

公开(公告)号：DE1170682B

公开(公告)日：1964-05-21

申请号：DEI0020431

申请日：1961-08-22

Applicant: IBM

Inventor： JUN ROBERT REX SEEBER ,  JUN ARTHUR JULIUS SCRIVER

IPC: G11C11/44 ,  G11C15/06

Abstract: 975,315. Associative memory. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 3, 1961 [Aug. 22, 1960], No. 28214/61. Drawings to Specification. Headings G4C and G4M. The cryotron memory disclosed is much the same as that described in Specification 936, 306 save that the dummy registers are omitted and the memory is capable only of the exit and entry operations disclosed in the above mentioned Specification. A set of words having the same tag are entered in the vacant locations of the memory. The control circuits ensure that each word is entered into the nearest vacant word register to the entry register. When read out is required and the tag of the set is searched for, the first word matched and read out is that nearest the entry register. In this way the set is read out in the same order as it was read in.