公开(公告)号：JPH03144776A

公开(公告)日：1991-06-20

申请号：JP25401590

申请日：1990-09-21

Applicant: IBM

Inventor： MAIKERU AACHIYANGERU ARANDA ,  IIDA YOSHIO ,  KAMEI AKIYUKI

IPC: G06F3/14 ,  G06F3/033 ,  G06F3/048 ,  G06T11/80

Abstract: PURPOSE: To lower a specification error rate by masking image fragments by respective masking fragments when the fragments cross with an area, logically combining them and generating true detection signals when a logical combination is provided with a value which is not zero. CONSTITUTION: A line fragment started in a block larger than BXmin and smaller than BXma-1 , the line fragment 116 for instance, can be expressed as simple incoming in an X-axial dimension. When the simple incoming X and the simple incoming Y are true, the line fragment is classified as the simple incoming and further analysis is not required. When simple outgoing X and the simple outgoing Y are true, the line fragment is expressed by the simple outgoing. The process of detecting the line fragment of the simple incoming and the simple outgoing reduces an analysis amount required for the respective line fragments. Thus, analysis is centralized onto segments 178 and 180 and the specification error, rate is reduced.