公开(公告)号：DE3278335D1

公开(公告)日：1988-05-19

申请号：DE3278335

申请日：1982-05-05

Applicant: IBM

Inventor： KAUFMAN DAN RAUL ,  THOMPSON GERHARD ROBERT

IPC: G06F7/00 ,  G06F7/501 ,  G06F7/503 ,  G06F7/575 ,  H03K19/20 ,  H03K19/21 ,  G06F7/38

公开(公告)号：DE3477302D1

公开(公告)日：1989-04-20

申请号：DE3477302

申请日：1984-07-16

Applicant: IBM

Inventor： KAUFMAN DAN RAUL

IPC: G11C8/00 ,  G11C7/22 ,  G11C8/18 ,  G11C11/24

Abstract: @ Memory access time, noise and costs are substantially reduced while reliability is increased by replacing fixed delay lines with a dynamic delay (41). This dynamic delay is placed on the same integrated circuit as the remainder of the memory access circuitry to eliminate tracking problems associated with off-chip delay lines. The dynamic delay element is activated after all of the row address strobe (RAS) bits have been generated. These RAS bits serve to strobe the row column address bits initially present on the address bus into the memory. After the delay time has elapsed an address multiplexor (43) switches column address bits onto the address bus to replace the prior row address bits. As soon as this switch is completed, column address strobe (CAS) bits are generated to strobe the column address bits into the memory.