公开(公告)号：US3769453A

公开(公告)日：1973-10-30

申请号：US3769453D

申请日：1972-08-17

Applicant: IBM

Inventor： BAHL L ,  BARNEA D ,  GROSSMAN D ,  KOBAYASHI H

IPC: H04B1/66 ,  H03M7/46 ,  H04L25/48 ,  H04N1/40 ,  H04N1/417 ,  H04N7/12

CPC classification number: H04N1/417 ,  H03M7/46

Abstract: A system for compacting digital data by means of prediction error coding. Prediction for each unknown bit is a function of previous detected levels in the data stream. A plurality of n-bit up-down counters, each associated with one of the possible states of prediction for an unknown bit, is utilized to arrive at a prediction of the level of the unknown bit. If the value found in the up-down counter is above a pre-specified level, a prediction will be made that the unknown bit is a one, otherwise, the prediction is zero. The predictor code output signals are summed modulo 2 with the actual signal value of the predicted bit in order to develop a prediction error pattern having a sparsity of ones. This error pattern is adaptable to run-length coding. After each prediction, the appropriate up-down counter is incremented or decremented depending on the actual value of the data bit that has been predicted so as to make future predictions adaptive to the previously coded data stream. The number of stages n is small so that the counters which control the predictions quickly adapt to changes in the nature of the actual information stream.

Abstract translation: 一种用于通过预测误差编码压缩数字数据的系统。 每个未知位的预测是数据流中以前检测到的电平的函数。 利用与未知位的预测的可能状态之一相关联的多个n位向上 - 向上计数器来得到未知位的电平的预测。 如果在递增计数器中找到的值高于预先设定的电平，则预测未知位为1，否则为0。

公开(公告)号：US3833900A

公开(公告)日：1974-09-03

申请号：US28189572

申请日：1972-08-18

Applicant: IBM

Inventor： BAHL L ,  BARNEA D ,  KOBAYASHI H

IPC: H03M7/30 ,  G06T9/00 ,  H03M7/32 ,  H04B14/06 ,  H04N1/417 ,  H04L3/00

CPC classification number: G06T9/005 ,  H04N1/4175

Abstract: A data compaction system wherein segmented binary data that has redundancy between segments is compacted by means of differential run-length encoding. For compaction of document digitized data, the segments represent lines on the document. Black image points on the document which are represented by a ''''1'''' are coded relative to the position of a 1 appearing in the line above the one being coded. The differential distance between binary 1 bit positions on successive lines are coded in accordance with a compaction code. Codewords having a small number of bits are used for small differentials.

Abstract translation: 数据压缩系统，其中在段之间具有冗余度的分段二进制数据通过差分游程编码来压缩。 为了压缩文档数字化数据，这些段表示文档上的行。 由“1”表示的文档上的黑色图像点相对于出现在正被编码的行上方的1的位置被编码。 根据压实码对连续行上的二进制1位位置之间的差分距离进行编码。 具有少量位的码流用于小差分。

公开(公告)号：US3792356A

公开(公告)日：1974-02-12

申请号：US3792356D

申请日：1971-12-27

Applicant: IBM

Inventor： KOBAYASHI H ,  TANG D

IPC: H03H15/00 ,  H04L25/03 ,  H04L25/497 ,  H04B3/14

CPC classification number: H04L25/03057 ,  H04L25/03146

Abstract: The present invention relates to a new receiver structure for the equalization of partial-response or correlative level coding systems in which the main equalizer and quantizer are embedded inside the inverse filter. The main embedded filter primarily accomplishes equalization of signal distortion in the tail portion of the received signal. According to a further aspect of the invention, a separate precursor equalizer may be utilized in front of the receiver structure in situations where the front end or precursor intersymbol interference is not negligible. According to one additional aspect of the invention where the number of precursor interference terms is small, a certain amount of precursor equalization may be included in the inverse filter portion of the main receiver structure. The receiver structure has a wide variety of applications and will function well with a number of different correlative coding schemes. Further, the main equalizer embedded within the receiver structure may be of the fixed, automatic or adaptive type as are well known in the art. The source of the correlatively encoded data containing undesired intersymbol interference due to characteristics of the channel or noise may be either a transmission line or, for example, a magnetic recording and pickup system utilizing the NRZI recording scheme.

Abstract translation: 本发明涉及用于均衡部分响应或相关级编码系统的新的接收机结构，其中主均衡器和量化器嵌入在反相滤波器内。 主嵌入式滤波器主要实现接收信号尾部信号失真的均衡。 根据本发明的另一方面，在前端或前体符号间干扰不可忽略的情况下，可以在接收机结构的前面使用单独的前体均衡器。 根据本发明的另一方面，其中前导干扰项的数量较少，在主接收机结构的逆滤波器部分中可以包括一定量的前驱均衡。 接收机结构具有广泛的应用，并且能够与许多不同的相关编码方案一起工作。 此外，嵌入在接收机结构内的主均衡器可以是本领域公知的固定，自动或自适应类型。 由于信道或噪声的特性，包含不期望的符号间干扰的相关编码数据的来源可以是传输线，或例如使用NRZI记录方案的磁记录和拾取系统。