Heterogeneous ports switch
    1.
    发明专利

    公开(公告)号:HK1011134A1

    公开(公告)日:1999-07-02

    申请号:HK98112102

    申请日:1998-11-18

    Applicant: IBM

    Abstract: A communication switch having heterogeneous ports. The heterogeneous ports are connected to nodes which may be operating at different frequencies and which may have different optical characteristics. In addition to the ports, the switch of the present invention includes a matrix controller and a matrix switch which is connected to the ports. When two ports want to communicate, the matrix controller commands the matrix switch to establish a physical connection between the ports. According to the present invention, data is transferred between the ports via the matrix switch in a serial and asynchronous manner. Because data is serially and asynchronously transmitted, high data rates through the matrix switch may be achieved.

    2.
    发明专利
    未知

    公开(公告)号:DE69228511T2

    公开(公告)日:1999-10-21

    申请号:DE69228511

    申请日:1992-07-14

    Applicant: IBM

    Abstract: A communication switch having heterogeneous ports. The heterogeneous ports are connected to nodes which may be operating at different frequencies and which may have different optical characteristics. In addition to the ports, the switch of the present invention includes a matrix controller and a matrix switch which is connected to the ports. When two ports want to communicate, the matrix controller commands the matrix switch to establish a physical connection between the ports. According to the present invention, data is transferred between the ports via the matrix switch in a serial and asynchronous manner. Because data is serially and asynchronously transmitted, high data rates through the matrix switch may be achieved.

    ELECTROCHROMIC DISPLAY DEVICES
    4.
    发明专利

    公开(公告)号:GB2152264A

    公开(公告)日:1985-07-31

    申请号:GB8334587

    申请日:1983-12-29

    Applicant: IBM

    Abstract: An electrochromic matrix display of the kind in which the display electrodes are supported on a substrate above a corresponding matrix of transistor switches employs constant current writing and potentiostatic erasure. The transistors are switchable by signals applied on respective gate lines to pass electric current on the respective drive lines to their display electrodes. Gate and drive selection means define the active gate and drive lines. During erasure, the potentiostatic erase voltage is applied to both ends of the selected drive lines simultaneously to speed up the current limited asynchronous erase operation. Optionally, the display may be driven alternately from opposite ends of the drive lines during a line-by-line writing operation.

    5.
    发明专利
    未知

    公开(公告)号:DE3879868T2

    公开(公告)日:1993-10-07

    申请号:DE3879868

    申请日:1988-10-14

    Applicant: IBM

    Abstract: An electro-optical transducer assembly for translating between an optical high speed serial data transmission path and parallel electrical data transmission paths is provided by a light emitting or light detecting device with serial terminals (13, 15), a logic chip (50, 51) with timing, amplifying, serializing or de-serializing circuitry, and a multilayer coupling chip (40, 41) with parallel input or output contacts mounted between the device and the logic chip for coupling the serial terminals of the device to the serial terminals on the logic chip and coupling the logic chip parallel terminals to the parallel input or output contacts.

    6.
    发明专利
    未知

    公开(公告)号:DE3879868D1

    公开(公告)日:1993-05-06

    申请号:DE3879868

    申请日:1988-10-14

    Applicant: IBM

    Abstract: An electro-optical transducer assembly for translating between an optical high speed serial data transmission path and parallel electrical data transmission paths is provided by a light emitting or light detecting device with serial terminals (13, 15), a logic chip (50, 51) with timing, amplifying, serializing or de-serializing circuitry, and a multilayer coupling chip (40, 41) with parallel input or output contacts mounted between the device and the logic chip for coupling the serial terminals of the device to the serial terminals on the logic chip and coupling the logic chip parallel terminals to the parallel input or output contacts.

    8.
    发明专利
    未知

    公开(公告)号:DE69433157D1

    公开(公告)日:2003-10-23

    申请号:DE69433157

    申请日:1994-10-28

    Applicant: IBM

    Abstract: A synchronizer and phase aligning method that provide signal smoothing and filtering functions as well as slip-cycle compensation, and allow for multichannel digital phase alignment, bus deskewing, integration of multiple transceivers within a single semiconductor chip, etc. A delay line produces a plurality of delayed input replicas of an input signal. A clock phase adjuster produces a sampling clock signal from a reference clock signal. The sampling clock signal may be phase adjusted to be offset from the input signal. After certain smoothing and filtering functions, selection logic detects a phase relationship between the sampling clock signal and the input replicas and identifies a closely synchronized signal for output. Using this identified replica signal, slip-cycle compensation and retiming logic outputs a compensated data output signal synchronized with the reference clock signal. Also, an integrated multiple transceiver produced using the phase alignment technique is presented.

    9.
    发明专利
    未知

    公开(公告)号:DE69228511D1

    公开(公告)日:1999-04-08

    申请号:DE69228511

    申请日:1992-07-14

    Applicant: IBM

    Abstract: A communication switch having heterogeneous ports. The heterogeneous ports are connected to nodes which may be operating at different frequencies and which may have different optical characteristics. In addition to the ports, the switch of the present invention includes a matrix controller and a matrix switch which is connected to the ports. When two ports want to communicate, the matrix controller commands the matrix switch to establish a physical connection between the ports. According to the present invention, data is transferred between the ports via the matrix switch in a serial and asynchronous manner. Because data is serially and asynchronously transmitted, high data rates through the matrix switch may be achieved.

    ELECTROCHROMIC MATRIX DISPLAY
    10.
    发明专利

    公开(公告)号:DE3469618D1

    公开(公告)日:1988-04-07

    申请号:DE3469618

    申请日:1984-11-15

    Applicant: IBM

    Abstract: An electrochromic matrix display of the kind in which the display electrodes are supported on a substrate above a corresponding matrix of transistor switches employs constant current writing and potentiostatic erasure. The transistors are switchable by signals applied on respective gate lines to pass electric current on the respective drive lines to their display electrodes. Gate and drive selection means define the active gate and drive lines. During erasure, the potentiostatic erase voltage is applied to both ends of the selected drive lines simultaneously to speed up the current limited asynchronous erase operation. Optionally, the display may be driven alternately from opposite ends of the drive lines during a line-by-line writing operation.

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