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公开(公告)号：US3909787A
公开(公告)日：1975-09-30
申请号：US48450974
申请日：1974-07-01
Applicant: IBM
Inventor： LAURER GEORGE JOSEPH , MOORE EUGENE ARNOLD
CPC classification number: G06K7/10871 , G06K7/14
Abstract: A data processor for use in conjunction with a coded label scanner for scanning non-oriented coded labels and which concurrently examines multiple phases of the data stream generated by the scanner to identify those data stream combinations which may be valid candidates or data because of predetermined characteristics.
Abstract translation: 一种数据处理器，与编码标签扫描器结合使用，用于扫描非取向编码标签，并且同时检查由扫描器生成的数据流的多个相位，以识别由于预定特性可能是有效候选或数据的那些数据流组合 。
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公开(公告)号：DE3280181D1
公开(公告)日：1990-06-28
申请号：DE3280181
申请日：1982-03-25
Applicant: IBM
Inventor： LAURER GEORGE JOSEPH , STOKES JR
Abstract: A technique for compensating for systematic errors in printing or reading bar codes is disclosed. Label decoding always begins with a center character and proceeds one character at a time toward a margin. When bar-space pair measurements indicate an ambiguous character (which can only be fully decoded using bar width measurements) error correction is based on the characteristics of the adjacent, previously decoded character.
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公开(公告)号：CH631563A5
公开(公告)日：1982-08-13
申请号：CH679078
申请日：1978-06-22
Applicant: IBM
Inventor： COWARDIN ROBERT LEWIS , LAURER GEORGE JOSEPH
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公开(公告)号：DE1228664B
公开(公告)日：1966-11-17
申请号：DEJ0029138
申请日：1965-09-29
Applicant: IBM
Inventor： DORRELL CARTER EATON , LAURER GEORGE JOSEPH
IPC: H03K5/02 , H03K19/018 , H04L25/02
Abstract: 1,101,855. Transistor switching circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. 20 Sept., 1965 [1 Oct., 1964], No. 39980/65. Heading H3T. A transistor circuit, having application as a balanced line driver for transmitting digital data over long lines (having conductors 7, 8) terminating in a differential sense amplifier, and also behaving as an exclusive OR gate, comprises a pair of transistors 1, 2, a first pair of similarly poled diodes 11, 12 and a second pair of similarly poled diodes 13, 14, all connected in series in a closed path with the transistors separating the first pair of diodes from the second, and a source of operating potential such that when one transistor (e.g. 2) is saturated and the other is cut off by input signals applied to the transistors, a positive potential is produced at a first output terminal (i.e. lead 7) and a negative potential is produced at a second output terminal (i.e. lead 8). As shown, the diodes 11-14 are identical Zener diodes and resistors 3-6 are all equal. Signals, e.g. the complemented outputs of a bistable trigger, are applied to resistors 15, 16. When transistor 2 is saturated and transistor 1 is cut off, the collector and emitter of transistor 2 are at earth, the diodes are in reverse breakdown conduction, applying a positive potential to line 8 and a negative potential to line 7. Transistors of opposite conductivity type may be used, connected emitter to emitter and collector to collector.
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公开(公告)号：DE2822359A1
公开(公告)日：1979-01-11
申请号：DE2822359
申请日：1978-05-23
Applicant: IBM
Inventor： COWARDIN ROBERT LEWIS , LAURER GEORGE JOSEPH
IPC: G01R29/02 , H03K5/00 , H03K5/1252 , H03K5/153
Abstract: A circuit for filtering positive and negative glitches (i.e., dropouts and noise spikes) in a pulse-like signal to be processed, utilizes a single timing element which introduces a uniform delay in both the leading and trailing edges of the pulse-like signal, thus eliminating pulse-width distortion of the signal. A single adjustment may be made which has the same effect on both the leading and trailing edges making a uniform adjustment of both delays easily achieved.
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Patent Agency Ranking
公开(公告)号：AU8166075A
公开(公告)日：1976-12-02
申请号：AU8166075
申请日：1975-05-29
Applicant: IBM
Inventor： LAURER GEORGE JOSEPH , MOORE EUGENE ARNOLD
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公开(公告)号：DE1157007B
公开(公告)日：1963-11-07
申请号：DEJ0018358
申请日：1960-06-28
Applicant: IBM
Inventor： LAURER GEORGE JOSEPH , SOUTHARD CARL DEMPSEY
IPC: G06F3/08
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公开(公告)号：DE1124274B
公开(公告)日：1962-02-22
申请号：DEJ0018285
申请日：1960-06-15
Applicant: IBM
Inventor： LAURER GEORGE JOSEPH
IPC: G06F3/08
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公开(公告)号：DE3780270D1
公开(公告)日：1992-08-13
申请号：DE3780270
申请日：1987-10-16
Applicant: IBM
Inventor： BROOCKMAN ERIC CHARLES , CATO ROBERT THOMAS , LAURER GEORGE JOSEPH
Abstract: System for adjusting holographic scanner lockout voltage in a fixed position optical scanner with a multi-faceted holographic disk including circuitry for adjusting the lockout voltage as a function of the focal length of the active facet. A facet identifying signal is used to address a lockout table (84) in processor (38) memory, and a digital value retrieved from the lockout table (84) is converted to analog form (66) and applied through a resistor (68) to a voltage divider (54, 56) in a scaling circuit (52). The voltage divider scales down a white peak following voltage (48) and compares (50) it to a black peak following voltage (48). The facet-dependent lockout voltage biases the junction (58) of the voltage divider to vary the effective lockout voltage as a function of the focal length of the currently active facet.
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公开(公告)号：DE2822667A1
公开(公告)日：1979-01-04
申请号：DE2822667
申请日：1978-05-24
Applicant: IBM
Inventor： COWARDIN ROBERT LEWIS , LAURER GEORGE JOSEPH
Abstract: A method and circuit for finding the beginning of valid coded information from a scanner reading a label such as the Universal Product Code (UPC) label establishes a plurality of counting gates based on a predetermined sequence of discrete signal transitions and counts a plurality of related pulse frequencies during the gating periods under control of the established counting gates. The accumulated counts are compared in a predetermined sequence to determine whether selected counts when compared bear a predetermined relationship to each other and a code generated indicative of the relationship which indicates the beginning of valid label data or invalid label data on a continuous basis.
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