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公开(公告)号：GB2576666A
公开(公告)日：2020-02-26
申请号：GB201917258
申请日：2018-05-30
Applicant: IBM
Inventor： GIOVANNI CHERUBINI , ROY CIDECIYAN , SIMEON FURRER , MARCEL KOSSEL , HAZAR YÜKSEL
Abstract: Calculating path metrics, associated with respective states of an n-state trellis, by accumulating branch metrics in a sequence detector. Each path metric is represented by N bits plus a wrap-around bit for indicating wrap-around of the N-bit value of that path metric.
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公开(公告)号：GB2633712A
公开(公告)日：2025-03-19
申请号：GB202417393
申请日：2023-04-24
Applicant: IBM
Inventor： GIOVANNI CHERUBINI , MARCEL KOSSEL
Abstract: Neuron circuits are provided for spiking neural network apparatus having multiple such neuron circuits interconnected by links, each associated with a respective weight, for transmission of signals between neuron circuits. A neuron circuit includes a digital transmitter for generating trigger signals, indicating a state of the neuron circuit, on outgoing links of the circuit. The state is encoded in a time interval defined by these trigger signals. The neuron circuit includes a digital receiver for detecting such trigger signals on incoming links of the circuit, and digital accumulator logic. In response to detecting a trigger signal on an incoming link, the digital accumulator logic is adapted to generate a weighted signal dependent on the time interval and to accumulate the weighted signals generated from trigger signals on the incoming links to determine the state of the neuron circuit.
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公开(公告)号：GB2576666B
公开(公告)日：2022-03-16
申请号：GB201917258
申请日：2018-05-30
Applicant: IBM
Inventor： GIOVANNI CHERUBINI , ROY CIDECIYAN , SIMEON FURRER , MARCEL KOSSEL , HAZAR YÜKSEL
Abstract: Calculating path metrics, associated with respective states of an n-state trellis, by accumulating branch metrics in a sequence detector. Each path metric is represented by N bits plus a wrap-around bit for indicating wrap-around of the N-bit value of that path metric.
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